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  1. 29 Jan, 2010 1 commit
  2. 11 Dec, 2009 1 commit
    • Yinghai Lu's avatar
      x86: Use find_e820() instead of hard coded trampoline address · 893f38d1
      Yinghai Lu authored
      Jens found the following crash/regression:
      
      [    0.000000] found SMP MP-table at [ffff8800000fdd80] fdd80
      [    0.000000] Kernel panic - not syncing: Overlapping early reservations 12-f011 MP-table mpc to 0-fff BIOS data page
      
      and
      
      [    0.000000] Kernel panic - not syncing: Overlapping early reservations 12-f011 MP-table mpc to 6000-7fff TRAMPOLINE
      
      and bisected it to b24c2a92 ("x86: Move find_smp_config()
      earlier and avoid bootmem usage").
      
      It turns out the BIOS is using the first 64k for mptable,
      without reserving it.
      
      So try to find good range for the real-mode trampoline instead of
      hard coding it, in case some bios tries to use that range for sth.
      Reported-by: default avatarJens Axboe <jens.axboe@oracle.com>
      Signed-off-by: default avatarYinghai Lu <yinghai@kernel.org>
      Tested-by: default avatarJens Axboe <jens.axboe@oracle.com>
      Cc: Randy Dunlap <randy.dunlap@oracle.com>
      LKML-Reference: <4B21630A.6000308@kernel.org>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      893f38d1
  3. 30 Nov, 2009 1 commit
  4. 24 Nov, 2009 1 commit
  5. 23 Nov, 2009 1 commit
  6. 16 Nov, 2009 2 commits
    • Kees Cook's avatar
      x86, mm: Report state of NX protections during boot · 4b0f3b81
      Kees Cook authored
      It is possible for x86_64 systems to lack the NX bit either due to the
      hardware lacking support or the BIOS having turned off the CPU capability,
      so NX status should be reported.  Additionally, anyone booting NX-capable
      CPUs in 32bit mode without PAE will lack NX functionality, so this change
      provides feedback for that case as well.
      Signed-off-by: default avatarKees Cook <kees.cook@canonical.com>
      Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
      LKML-Reference: <1258154897-6770-6-git-send-email-hpa@zytor.com>
      4b0f3b81
    • H. Peter Anvin's avatar
      x86, mm: Clean up and simplify NX enablement · 4763ed4d
      H. Peter Anvin authored
      The 32- and 64-bit code used very different mechanisms for enabling
      NX, but even the 32-bit code was enabling NX in head_32.S if it is
      available.  Furthermore, we had a bewildering collection of tests for
      the available of NX.
      
      This patch:
      
      a) merges the 32-bit set_nx() and the 64-bit check_efer() function
         into a single x86_configure_nx() function.  EFER control is left
         to the head code.
      
      b) eliminates the nx_enabled variable entirely.  Things that need to
         test for NX enablement can verify __supported_pte_mask directly,
         and cpu_has_nx gives the supported status of NX.
      Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
      Cc: Tejun Heo <tj@kernel.org>
      Cc: Brian Gerst <brgerst@gmail.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Pekka Enberg <penberg@cs.helsinki.fi>
      Cc: Vegard Nossum <vegardno@ifi.uio.no>
      Cc: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
      Cc: Chris Wright <chrisw@sous-sol.org>
      LKML-Reference: <1258154897-6770-5-git-send-email-hpa@zytor.com>
      Acked-by: default avatarKees Cook <kees.cook@canonical.com>
      4763ed4d
  7. 11 Nov, 2009 1 commit
  8. 10 Nov, 2009 1 commit
    • Yong Wang's avatar
      x86: Under BIOS control, restore AP's APIC_LVTTHMR to the BSP value · a2202aa2
      Yong Wang authored
      On platforms where the BIOS handles the thermal monitor interrupt,
      APIC_LVTTHMR on each logical CPU is programmed to generate a SMI
      and OS must not touch it.
      
      Unfortunately AP bringup sequence using INIT-SIPI-SIPI clears all
      the LVT entries except the mask bit. Essentially this results in
      all LVT entries including the thermal monitoring interrupt set
      to masked (clearing the bios programmed value for APIC_LVTTHMR).
      
      And this leads to kernel take over the thermal monitoring
      interrupt on AP's but not on BSP (leaving the bios programmed
      value only on BSP).
      
      As a result of this, we have seen system hangs when the thermal
      monitoring interrupt is generated.
      
      Fix this by reading the initial value of thermal LVT entry on
      BSP and if bios has taken over the control, then program the
      same value on all AP's and leave the thermal monitoring
      interrupt control on all the logical cpu's to the bios.
      Signed-off-by: default avatarYong Wang <yong.y.wang@intel.com>
      Reviewed-by: default avatarSuresh Siddha <suresh.b.siddha@intel.com>
      Cc: Borislav Petkov <borislav.petkov@amd.com>
      Cc: Arjan van de Ven <arjan@infradead.org>
      LKML-Reference: <20091110013824.GA24940@ywang-moblin2.bj.intel.com>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      Cc: stable@kernel.org
      a2202aa2
  9. 06 Nov, 2009 1 commit
  10. 12 Oct, 2009 2 commits
    • David Rientjes's avatar
      x86: Export srat physical topology · 8716273c
      David Rientjes authored
      This is the counterpart to "x86: export k8 physical topology" for
      SRAT. It is not as invasive because the acpi code already seperates
      node setup into detection and registration steps, with the
      exception of registering e820 active regions in
      acpi_numa_memory_affinity_init().  This is now moved to
      acpi_scan_nodes() if NUMA emulation is disabled or deferred.
      
      acpi_numa_init() now returns a value which specifies whether an
      underlying SRAT was located.  If so, that topology can be used by
      the emulation code to interleave emulated nodes over physical nodes
      or to register the nodes for ACPI.
      
      acpi_get_nodes() may now be used to export the srat physical
      topology of the machine for NUMA emulation.
      Signed-off-by: default avatarDavid Rientjes <rientjes@google.com>
      Cc: Andreas Herrmann <andreas.herrmann3@amd.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Balbir Singh <balbir@linux.vnet.ibm.com>
      Cc: Ankita Garg <ankita@in.ibm.com>
      Cc: Len Brown <len.brown@intel.com>
      LKML-Reference: <alpine.DEB.1.00.0909251518580.14754@chino.kir.corp.google.com>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      8716273c
    • David Rientjes's avatar
      x86: Export k8 physical topology · 8ee2debc
      David Rientjes authored
      To eventually interleave emulated nodes over physical nodes, we
      need to know the physical topology of the machine without actually
      registering it.  This does the k8 node setup in two parts:
      detection and registration.  NUMA emulation can then used the
      physical topology detected to setup the address ranges of emulated
      nodes accordingly.  If emulation isn't used, the k8 nodes are
      registered as normal.
      
      Two formals are added to the x86 NUMA setup functions: `acpi' and
      `k8'. These represent whether ACPI or K8 NUMA has been detected;
      both cannot be true at the same time.  This specifies to the NUMA
      emulation code whether an underlying physical NUMA topology exists
      and which interface to use.
      
      This patch deals solely with separating the k8 setup path into
      Northbridge detection and registration steps and leaves the ACPI
      changes for a subsequent patch.  The `acpi' formal is added here,
      however, to avoid touching all the header files again in the next
      patch.
      
      This approach also ensures emulated nodes will not span physical
      nodes so the true memory latency is not misrepresented.
      
      k8_get_nodes() may now be used to export the k8 physical topology
      of the machine for NUMA emulation.
      Signed-off-by: default avatarDavid Rientjes <rientjes@google.com>
      Cc: Andreas Herrmann <andreas.herrmann3@amd.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Balbir Singh <balbir@linux.vnet.ibm.com>
      Cc: Ankita Garg <ankita@in.ibm.com>
      Cc: Len Brown <len.brown@intel.com>
      LKML-Reference: <alpine.DEB.1.00.0909251518400.14754@chino.kir.corp.google.com>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      8ee2debc
  11. 19 Sep, 2009 1 commit
    • Yinghai Lu's avatar
      Revert 'x86: Fix system crash when loading with "reservetop" parameter' · eda6da92
      Yinghai Lu authored
      After close looking, commit 8126dec3 will break:
      
       1. some cpu feature  in early stage too, like cpu_has_x2apic
       2. will break built-in-command line
       3. will break other memmap= and mem=
       4. early_dbgp and early_console that will use early_ioremap to access mmio (?)
      
      So revert it.
      
      Reported-by: Hugh Dickins <hugh.dickins@tiscali.co.uk>,
      Cc: Linus Torvalds <torvalds@linux-foundation.org>,
      Cc: Andrew Morton <akpm@linux-foundation.org>,
      LKML-Reference: <4AB51DFD.2000904@kernel.org>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      eda6da92
  12. 02 Sep, 2009 1 commit
  13. 31 Aug, 2009 10 commits
  14. 29 Aug, 2009 1 commit
    • Jan Beulich's avatar
      x86: Fix earlyprintk=dbgp for machines without NX · 47d25003
      Jan Beulich authored
      Since parse_early_param() may (e.g. for earlyprintk=dbgp)
      involve calls to page table manipulation functions (here
      set_fixmap_nocache()), NX hardware support must be determined
      before calling that function (so that __supported_pte_mask gets
      properly set up).
      
      But the call after parse_early_param() can also not go away, as
      that will honor eventual command line specified disabling of
      the NX functionality.
      
      ( This will then just result in whatever mappings got
        established during parse_early_param() having the NX bit set
        despite it being disabled on the command line, but I think
        that's tolerable).
      Signed-off-by: default avatarJan Beulich <jbeulich@novell.com>
      Cc: Yinghai Lu <yhlu.kernel@gmail.com>
      LKML-Reference: <4A97F3BD02000078000121B9@vpn.id2.novell.com>
      [ merged to x86/pat to resolve a conflict. ]
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      47d25003
  15. 28 Aug, 2009 1 commit
  16. 27 Aug, 2009 2 commits
  17. 21 Aug, 2009 1 commit
    • Xiao Guangrong's avatar
      x86: Fix system crash when loading with "reservetop" parameter · 8126dec3
      Xiao Guangrong authored
      The system will die if the kernel is booted with "reservetop"
      parameter, in present code, parse "reservetop" parameter after
      early_ioremap_init(), and some function still use
      early_ioremap() after it.
      
      The problem is, "reservetop" parameter can modify
      'FIXADDR_TOP', then the virtual address got by early_ioremap()
      is base on old 'FIXADDR_TOP', but the page mapping is base on
      new 'FIXADDR_TOP', it will occur page fault, and the IDT is not
      prepare yet, so, the system is dead.
      
      So, put parse_early_param() in the front of
      early_ioremap_init() in this patch.
      Signed-off-by: default avatarXiao Guangrong <xiaoguangrong@cn.fujitsu.com>
      Cc: yinghai@kernel.org
      Cc: Andrew Morton <akpm@linux-foundation.org>
      LKML-Reference: <4A8D402F.4080805@cn.fujitsu.com>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      8126dec3
  18. 21 Jul, 2009 1 commit
    • Joseph Cihula's avatar
      x86, intel_txt: Intel TXT boot support · 31625340
      Joseph Cihula authored
      This patch adds kernel configuration and boot support for Intel Trusted
      Execution Technology (Intel TXT).
      
      Intel's technology for safer computing, Intel Trusted Execution
      Technology (Intel TXT), defines platform-level enhancements that
      provide the building blocks for creating trusted platforms.
      
      Intel TXT was formerly known by the code name LaGrande Technology (LT).
      
      Intel TXT in Brief:
      o  Provides dynamic root of trust for measurement (DRTM)
      o  Data protection in case of improper shutdown
      o  Measurement and verification of launched environment
      
      Intel TXT is part of the vPro(TM) brand and is also available some
      non-vPro systems.  It is currently available on desktop systems based on
      the Q35, X38, Q45, and Q43 Express chipsets (e.g. Dell Optiplex 755, HP
      dc7800, etc.) and mobile systems based on the GM45, PM45, and GS45
      Express chipsets.
      
      For more information, see http://www.intel.com/technology/security/.
      This site also has a link to the Intel TXT MLE Developers Manual, which
      has been updated for the new released platforms.
      
      A much more complete description of how these patches support TXT, how to
      configure a system for it, etc. is in the Documentation/intel_txt.txt file
      in this patch.
      
      This patch provides the TXT support routines for complete functionality,
      documentation for TXT support and for the changes to the boot_params structure,
      and boot detection of a TXT launch.  Attempts to shutdown (reboot, Sx) the system
      will result in platform resets; subsequent patches will support these shutdown modes
      properly.
      
       Documentation/intel_txt.txt      |  210 +++++++++++++++++++++
       Documentation/x86/zero-page.txt  |    1
       arch/x86/include/asm/bootparam.h |    3
       arch/x86/include/asm/fixmap.h    |    3
       arch/x86/include/asm/tboot.h     |  197 ++++++++++++++++++++
       arch/x86/kernel/Makefile         |    1
       arch/x86/kernel/setup.c          |    4
       arch/x86/kernel/tboot.c          |  379 +++++++++++++++++++++++++++++++++++++++
       security/Kconfig                 |   30 +++
       9 files changed, 827 insertions(+), 1 deletion(-)
      Signed-off-by: default avatarJoseph Cihula <joseph.cihula@intel.com>
      Signed-off-by: default avatarShane Wang <shane.wang@intel.com>
      Signed-off-by: default avatarGang Wei <gang.wei@intel.com>
      Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
      31625340
  19. 18 Jul, 2009 1 commit
  20. 23 Jun, 2009 1 commit
    • Pekka J Enberg's avatar
      x86: Move init_gbpages() to setup_arch() · 854c879f
      Pekka J Enberg authored
      The init_gbpages() function is conditionally called from
      init_memory_mapping() function. There are two call-sites where
      this 'after_bootmem' condition can be true: setup_arch() and
      mem_init() via pci_iommu_alloc().
      
      Therefore, it's safe to move the call to init_gbpages() to
      setup_arch() as it's always called before mem_init().
      
      This removes an after_bootmem use - paving the way to remove
      all uses of that state variable.
      Signed-off-by: default avatarPekka Enberg <penberg@cs.helsinki.fi>
      Acked-by: default avatarYinghai Lu <yinghai@kernel.org>
      LKML-Reference: <Pine.LNX.4.64.0906221731210.19474@melkki.cs.Helsinki.FI>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      854c879f
  21. 11 Jun, 2009 1 commit
  22. 12 May, 2009 1 commit
    • H. Peter Anvin's avatar
      x86: add extension fields for bootloader type and version · 5031296c
      H. Peter Anvin authored
      A long ago, in days of yore, it all began with a god named Thor.
      There were vikings and boats and some plans for a Linux kernel
      header.  Unfortunately, a single 8-bit field was used for bootloader
      type and version.  This has generally worked without *too* much pain,
      but we're getting close to flat running out of ID fields.
      
      Add extension fields for both type and version.  The type will be
      extended if it the old field is 0xE; the version is a simple MSB
      extension.
      
      Keep /proc/sys/kernel/bootloader_type containing
      (type << 4) + (ver & 0xf) for backwards compatiblity, but also add
      /proc/sys/kernel/bootloader_version which contains the full version
      number.
      
      [ Impact: new feature to support more bootloaders ]
      Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
      5031296c
  23. 11 May, 2009 1 commit
  24. 30 Apr, 2009 1 commit
  25. 10 Apr, 2009 1 commit
  26. 30 Mar, 2009 1 commit
  27. 15 Mar, 2009 2 commits
    • Jeremy Fitzhardinge's avatar
      x86: allow extend_brk users to reserve brk space · 796216a5
      Jeremy Fitzhardinge authored
      Impact: new interface; remove hard-coded limit
      
      Add RESERVE_BRK(name, size) macro to reserve space in the brk
      area.  This should be a conservative (ie, larger) estimate of
      how much space might possibly be required from the brk area.
      Any unused space will be freed, so there's no real downside
      on making the reservation too large (within limits).
      
      The name should be unique within a given file, and somewhat
      descriptive.
      
      The C definition of RESERVE_BRK() ends up being more complex than
      one would expect to work around a cluster of gcc infelicities:
      
        The first attempt was to simply try putting __section(.brk_reservation)
        on a variable.  This doesn't work because it ends up making it a
        @progbits section, which gets actual space allocated in the vmlinux
        executable.
      
        The second attempt was to emit the space into a section using asm,
        but gcc doesn't allow arguments to be passed to file-level asm()
        statements, making it hard to pass in the size.
      
        The final attempt is to wrap the asm() in a function to allow
        it to have arguments, and put the function itself into the
        .discard section, which vmlinux*.lds drops entirely from the
        emitted vmlinux.
      Signed-off-by: default avatarJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
      Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
      796216a5
    • Jeremy Fitzhardinge's avatar
      x86: use brk allocation for DMI · 6de6cb44
      Jeremy Fitzhardinge authored
      Impact: use new interface instead of previous ad hoc implementation
      
      Use extend_brk() to allocate memory for DMI rather than having an
      ad-hoc allocator.
      Signed-off-by: default avatarJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
      Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
      6de6cb44