- 03 Apr, 2015 8 commits
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Olof Johansson authored
Merge tag 'samsung-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc Merge "Samsung mach updates for v4.1" from Kukjin Kim: - for s3c64xx : use fixed IRQ bases to avoid conflicts on Cragganmore - for exynos3250 : add cpuidle and AFTR mode support : fix CPU1 hotplug - for exynos SoCs : add code for setting/clearing boot flag for cpuidle AFTR : remove left over 'extra_save' and constify 'exynos_pm_data' array : use static in suspend.c as per compiler suggestions : use platform device name as power domain name : add support for async-bridge clocks for pm_domains (exynos5420) * tag 'samsung-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: allow cpuidle driver usage on Exynos3250 SoC ARM: EXYNOS: add AFTR mode support for Exynos3250 ARM: EXYNOS: add code for setting/clearing boot flag ARM: EXYNOS: fix CPU1 hotplug on Exynos3250 ARM: S3C64XX: Use fixed IRQ bases to avoid conflicts on Cragganmore ARM: EXYNOS: Remove left over 'extra_save' ARM: EXYNOS: Constify exynos_pm_data array ARM: EXYNOS: use static in suspend.c ARM: EXYNOS: Use platform device name as power domain name ARM: EXYNOS: add support for async-bridge clocks for pm_domains Signed-off-by:
Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'imx-soc-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc Merge "ARM: imx: soc changes for 4.1" from Shawn Guo: The i.MX SoC changes for 4.1: - An error handling improvement on imx-weim bus driver - A number of imx6q clock tree update around MIPI support - Add support for i.MX6 GPU/VPU power domain - Enable SMP_ON_UP build for Vybrid - Let MXC_DEBUG_BOARD depend on 3-stack (3DS) boards * tag 'imx-soc-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: depend MXC debug board on 3DS machines ARM: imx6: gpc: Add PU power domain for GPU/VPU Documentation: Add device tree bindings for Freescale i.MX GPC bus: imx-weim: improve error handling upon child probe-failure ARM: imx6q: clk: Add support for mipi_ipg clock as a shared clock gate ARM: imx6q: clk: Add support for mipi_core_cfg clock as a shared clock gate ARM: imx6q: clk: Change hsi_tx clock to be a shared clock gate ARM: imx6q: clk: Change hdmi_isfr clock's parent to be video_27m clock ARM: imx6q: clk: Add the video_27m clock ARM: imx6q: Add GPR3 MIPI muxing control register field shift bits definition ARM: vf610: use SMP_ON_UP for Vybrid SoC Signed-off-by:
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Olof Johansson authored
Merge tag 'v4.1-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Merge "omap soc changes for v4.1" from Tony Lindgren: SoC related changes for omaps. Mostly hwmod related changes via Paul Walmsley <paul@pwsan.com>: OMAP hwmod data changes for AM43xx and DRA7xx for v4.1 Add support for the AM43xx HDQ/1-wire driver and fix the GPTIMER data for DRA7xx. Note that I do not have AM43xx nor DRA7xx boards, and cannot test these patches on those platforms. Basic build, boot, and PM test logs are available at: http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v4.1/20150324185246/ * tag 'v4.1-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4 ARM: DRA7: hwmod: Add data for GPTimers 13 through 16 ARM: omap-device: add missed callback for suspend-to-disk ARM: OMAP2: hwmod: AM43XX: Add hwmod support for HDQ-1W Signed-off-by:
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Nicolas Pitre authored
The custom suspend callback is removed for this change. The extra call to exynos_cpu_power_up(() that was present at the end of exynos_suspend() is now relocated to the cpu_is_up callback. Signed-off-by:
Nicolas Pitre <nico@linaro.org> Tested-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by:
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Nicolas Pitre authored
Signed-off-by:
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Nicolas Pitre authored
Currently the cpu argument validity check uses a hardcoded limit of 4. The DCSCB configuration data provides the actual number of CPUs and we already use it elsewhere. Let's improve the cpu argument validity check by using that information instead. Signed-off-by:
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Nicolas Pitre authored
Signed-off-by:
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Nicolas Pitre authored
All backends are reimplementing a variation of the same CPU reference count handling. They are also responsible for driving the MCPM special low-level locking. This is needless duplication, involving algorithmic requirements that are not necessarily obvious to the uninitiated. And from past code review experience, those were all initially implemented badly. After 3 years, it is time to refactor as much common code to the core MCPM facility to make the backends as simple as possible. To avoid a flag day, the new scheme is introduced in parallel to the existing backend interface. When all backends are converted over, the compatibility interface could be removed. The new MCPM backend interface implements simpler methods addressing very platform specific tasks performed under lock protection while keeping the algorithmic complexity and race avoidance local to the core code. Signed-off-by:
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- 02 Apr, 2015 1 commit
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Olof Johansson authored
Merge tag 'v4.1-rockchip-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc Merge "ARM: rockchip: soc code changes for 4.1" from Heiko Stuebner: Some suspend improvements reducing resume time and making sure the watchdog does not reset after 12 hours and a change to constify and staticize some smp parts. * tag 'v4.1-rockchip-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: rockchip: disable watchdog during suspend ARM: rockchip: decrease the wait time for resume ARM: rockchip: Constify struct regmap_config and staticize local function Signed-off-by:
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- 27 Mar, 2015 1 commit
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Tony Lindgren authored
Merge tag 'for-v4.1/omap-hwmod-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.1/soc OMAP hwmod data changes for AM43xx and DRA7xx for v4.1 Add support for the AM43xx HDQ/1-wire driver and fix the GPTIMER data for DRA7xx. Note that I do not have AM43xx nor DRA7xx boards, and cannot test these patches on those platforms. Basic build, boot, and PM test logs are available at: http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v4.1/20150324185246/
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- 26 Mar, 2015 5 commits
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Bartlomiej Zolnierkiewicz authored
Register cpuidle platform device on Exynos3250 SoC allowing EXYNOS cpuidle driver usage on this SoC. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by:
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Reviewed-by:
Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by:
Kyungmin Park <kyungmin.park@samsung.com> Tested-by:
Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by:
Kukjin Kim <kgene@kernel.org>
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Bartlomiej Zolnierkiewicz authored
AFTR mode support brings reduced energy consumption and is a prerequisite for more advanced W-AFTR/LPA power saving modes. AFTR mode has been already supported on other Exynos SoCs for few years and this patch adds its support for Exynos3250 SoC. The differences in Exynos3250 SoC AFTR mode support when compared to Exynos4x12 SoCs are: - different secure firmware calls are used - different S5P_WAKEUP_MASK wakeup mask is used - S5P_WAKEUP_MASK2 wakeup mask needs to be set in addition to the standard S5P_WAKEUP_MASK one - C2_STATE BOOT mode flag needs to be set/cleared pre/post AFTR Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by:
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Bartlomiej Zolnierkiewicz authored
This code is needed for cpuidle (W-)AFTR mode support on Exynos3250. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by:
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Bartlomiej Zolnierkiewicz authored
CPU1 hotplug may hang when AFTR is used. Fix it by: - setting AUTOWAKEUP_EN bit in ARM_COREx_CONFIGURATION register in exynos_cpu_power_up() - not clearing reserved bits of ARM_COREx_CONFIGURATION register in exynos_cpu_power_down() - waiting while an undocumented register 0x0908 becomes non-zero in exynos_core_restart() - using dsb_sev() instead of IPI in exynos_boot_secondary() on Exynos3250 This patch also fixes hotplug issues during resume from S2R: $ echo mem > /sys/power/state [ 156.517266] Disabling non-boot CPUs ... [ 156.517781] IRQ18 no longer affine to CPU1 [ 156.518043] CPU1: shutdown [ 156.544718] Enabling non-boot CPUs ... [ 156.554925] CPU1: Software reset [ 158.552631] CPU1: failed to come online [ 158.552753] Error taking CPU1 up: -5 Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by:
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Charles Keepax authored
There are two PMICs on Cragganmore, currently one dynamically assign its IRQ base and the other uses a fixed base. It is possible for the statically assigned PMIC to fail if its IRQ is taken by the dynamically assigned one. Fix this by statically assigning both the IRQ bases. Signed-off-by:
Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Cc: <stable@vger.kernel.org> Signed-off-by:
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- 24 Mar, 2015 2 commits
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Suman Anna authored
GPTimer 4 is a regular timer and not a secure timer, so fix the hwmod to use the correct hwmod class (even though there are no differences in the class definition itself). Signed-off-by:
Suman Anna <s-anna@ti.com> [paul@pwsan.com: dropped dra7xx_timer_secure_hwmod_class and dra7xx_timer_secure_sysc to avoid compiler warnings] Signed-off-by:
Paul Walmsley <paul@pwsan.com>
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Suman Anna authored
Add the hwmod data for GPTimers 13, 14, 15 and 16. All these timers are present in the L4PER3 clock domain. The corresponding DT nodes are already present but disabled. Signed-off-by:
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- 17 Mar, 2015 5 commits
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Krzysztof Kozlowski authored
Since 32b0aa9a ("ARM: EXYNOS: Remove i2c sys configuration related code") the Exynos 5250 no longer saves additional registers under 'exynos_pm_data.extra_save' field. No one else uses this code so get rid of it making also 'exynos_pm_data' const everywhere. Signed-off-by:
Pankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by:
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Krzysztof Kozlowski authored
The 'exynos5420_pm_data' is not modified and can be made const. Signed-off-by:
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Krzysztof Kozlowski authored
The 'pm_data', 'exynos_release_ret_regs', 'exynos3250_release_ret_regs' and 'exynos5420_release_ret_regs' are not exported nor used outside of suspend.c file. Make them static. This fixes following sparse warnings: arch/arm/mach-exynos/suspend.c:83:23: warning: symbol 'pm_data' was not declared. Should it be static? arch/arm/mach-exynos/suspend.c:106:14: warning: symbol 'exynos_release_ret_regs' was not declared. Should it be static? arch/arm/mach-exynos/suspend.c:117:14: warning: symbol 'exynos5420_release_ret_regs' was not declared. Should it be static? Signed-off-by:
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Krzysztof Kozlowski authored
The power domain nodes in DTS may be very generic (e.g. "power-domain" for Exynos 5420) making it very hard to debug: $ cat /sys/kernel/debug/pm_genpd/pm_genpd_summary domain status slaves power-domain on Use platform device name instead so the names will be a little more user friendly: domain status slaves 100440e0.power-domain on Signed-off-by:Javier Martinez Canillas <javier.martinez@collabora.co.uk> Suggested-by:
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by:
Kevin Hilman <khilman@linaro.org> Signed-off-by:
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Andrzej Hajda authored
Since Exynos5420 there are async-bridges (ASB) between different IPs. These bridges must be operational during power domain on/off, ie. clocks used by these bridges should be enabled. This patch enabled these clocks during domain on/off. Signed-off-by:
Andrzej Hajda <a.hajda@samsung.com> Reviewed-by:
Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by:
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- 16 Mar, 2015 7 commits
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Grygorii Strashko authored
Add missed callback needed for supporting suspend-to-disk (hibernation) mode. Signed-off-by:
Grygorii Strashko <Grygorii.Strashko@linaro.org> Acked-by:
Tony Lindgren <tony@atomide.com>
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Arnd Bergmann authored
Merge tag 'renesas-da9063-da9210-quirk-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Renesas ARM Based SoC da9063/da9210 Regulator Quirk for v4.1" from Simon Horman: The r8a7790/lager and r8a7791/koelsch development boards have da9063 and da9210 regulators. Both regulators have their interrupt request lines tied to the same interrupt pin (IRQ2) on the SoC. After cold boot or da9063-induced restart, both the da9063 and da9210 seem to assert their interrupt request lines. Hence as soon as one driver requests this irq, it gets stuck in an interrupt storm, as it only manages to deassert its own interrupt request line, and the other driver hasn't installed an interrupt handler yet. To handle this, install a quirk that masks the interrupts in both the da9063 and da9210. This quirk has to run after the i2c master driver has been initialized, but before the i2c slave drivers are initialized. As it depends on i2c, select I2C if one of the affected platforms is enabled in the kernel config. * tag 'renesas-da9063-da9210-quirk-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: lager: Add da9063 PMIC device node for system restart ARM: shmobile: lager dts: Add da9210 regulator interrupt ARM: shmobile: koelsch: Add da9063 PMIC device node for system restart ARM: shmobile: koelsch dts: Add da9210 regulator interrupt ARM: shmobile: R-Car Gen2: Add da9063/da9210 regulator quirk
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Tsahee Zidenberg authored
Add myself as a maintainer for arch/arm/mach-alpine/ Signed-off-by:
Tsahee Zidenberg <tsahee@annapurnalabs.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Tsahee Zidenberg authored
This patch introduces documentation for alpine devicetree bindings. Signed-off-by:
Barak Wasserstrom <barak@annapurnalabs.com> Signed-off-by:
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Tsahee Zidenberg authored
This patch introduces support for waking up secondary CPU cores on Alpine platform. Signed-off-by:
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Tsahee Zidenberg authored
Alpine platform includes UART8250 that can be used for early prints. Signed-off-by:
Saeed Bishara <saeed@annapurnalabs.com> Signed-off-by:
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Tsahee Zidenberg authored
This patch introduces initial architecture and device-tree support. Signed-off-by:
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- 13 Mar, 2015 1 commit
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Stefan Agner authored
Depend the MXC debug board on machines which actually support it. Signed-off-by:
Stefan Agner <stefan@agner.ch> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- 11 Mar, 2015 10 commits
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git://git.infradead.org/linux-mvebuArnd Bergmann authored
Pull "mvebu soc changes for v4.1 (part #1)" from Gregory CLEMENT: - Add support for a new SoC: Armada 39x * tag 'mvebu-soc-4.1' of git://git.infradead.org/linux-mvebu: Documentation: arm: update supported Marvell EBU processors ARM: mvebu: add core support for Armada 39x devicetree: bindings: add new SMP enable method for Marvell Armada 39x devicetree: bindings: add DT binding for the Marvell Armada 39x SoC family
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Chris Zhong authored
The watchdog clock should be disable in dw_wdt_suspend, but we set a dummy clock to watchdog for rk3288. So the watchdog will continue to work during suspend. And we switch the system clock to 32khz from 24Mhz, during suspend, so the watchdog timer over count will increase to 755 times, about 12.5 hours, the original value is 60 seconds. So watchdog will reset the system over a night, but voltage are all incorrect, then it hang on reset. Signed-off-by:
Chris Zhong <zyw@rock-chips.com> Signed-off-by:
Daniel Kurtz <djkurtz@google.com> Reviewed-by:
Doug Anderson <dianders@chromium.org> Tested-by:
Heiko Stuebner <heiko@sntech.de>
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Chris Zhong authored
The register-default delay time for wait the 24MHz OSC stabilization as well as PMU stabilization is 750ms, let's decrease them to a still safe 30ms. Signed-off-by:
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Krzysztof Kozlowski authored
The regmap_config struct may be const because it is not modified by the driver and regmap_init() accepts pointer to const. Make function rockchip_get_core_reset() static because it is not used outside of the platsmp.c file. Signed-off-by:
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Philipp Zabel authored
When generic pm domain support is enabled, the PGC can be used to completely gate power to the PU power domain containing GPU3D, GPU2D, and VPU cores. This code triggers the PGC powerdown sequence to disable the GPU/VPU isolation cells and gate power and then disables the PU regulator. To reenable, the reverse powerup sequence is triggered after the PU regulator is enabled again. The GPU and VPU devices in the PU power domain temporarily need to be clocked during powerup, so that the reset machinery can work. [Avoid explicit regulator enabling in probe, unless !PM] Signed-off-by:
Markus Pargmann <mpa@pengutronix.de> Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
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Philipp Zabel authored
The i.MX6 contains a power controller that controls power gating and sequencing for the SoC's power domains. Signed-off-by:
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Geert Uytterhoeven authored
Add a device node for the da9063 PMIC, with subnodes for rtc and wdt. Regulator support is not yet included. This allows the system to be restarted when the watchdog timer times out, or when a system restart is requested. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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Geert Uytterhoeven authored
The da9210 regulator is connected to IRQ2. Reflect this in its device node, so the driver can use it when it gains interrupt support. Signed-off-by:
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Geert Uytterhoeven authored
Add a device node for the da9063 PMIC, with subnodes for rtc and wdt. Regulator support is not yet included. This allows the system to be restarted when the watchdog timer times out, or when a system restart is requested. Signed-off-by:
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Geert Uytterhoeven authored
The da9210 regulator is connected to IRQ2. Reflect this in its device node, so the driver can use it when it gains interrupt support. Signed-off-by:
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