1. 02 Jul, 2014 2 commits
  2. 01 Jul, 2014 10 commits
  3. 27 Jun, 2014 1 commit
  4. 25 Jun, 2014 4 commits
  5. 24 Jun, 2014 13 commits
    • Rahul Sharma's avatar
      drm/exynos: enable vsync interrupt while waiting for vblank · 5d39b9ee
      Rahul Sharma authored
      mixer_wait_for_vblank function expects that the upcoming
      vsync interrupt handler routine will clear the
      wait_vsync_event atomic variable.
      
      For this to happen, interrupts should be enabled and
      disabled properly.
      Signed-off-by: default avatarRahul Sharma <rahul.sharma@samsung.com>
      Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
      5d39b9ee
    • Rahul Sharma's avatar
      drm/exynos: soft reset mixer before reconfigure after power-on · d74ed937
      Rahul Sharma authored
      Mixer soft reset is a recommended step before reconfiguring
      the mixer after power on. Mixer looses the previous state of
      DMAs if soft reset. This is the recommendation from the
      hardware team.
      Signed-off-by: default avatarRahul Sharma <rahul.sharma@samsung.com>
      Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
      d74ed937
    • Rahul Sharma's avatar
      drm/exynos: allow multiple layer updates per vsync for mixer · 5c0f4829
      Rahul Sharma authored
      Allowing only one layer update per vsync can cause issues
      while there are update available for both layers. There is
      a good amount of possibility to loose updates if we allow
      single update per vsync.
      Signed-off-by: default avatarRahul Sharma <rahul.sharma@samsung.com>
      Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
      5c0f4829
    • Chris Wilson's avatar
      drm/i915: Hold the table lock whilst walking the file's idr and counting the objects in debugfs · 5b5ffff0
      Chris Wilson authored
      Fixes an issue whereby we may race with the table updates (before the
      core takes the struct_mutex) and so risk dereferencing a stale pointer in
      the iterator for /debugfs/.../i915_gem_objects. For example,
      
      [ 1524.757545] BUG: unable to handle kernel paging request at f53af748
      [ 1524.757572] IP: [<c1406982>] per_file_stats+0x12/0x100
      [ 1524.757599] *pdpt = 0000000001b13001 *pde = 00000000379fb067 *pte = 80000000353af060
      [ 1524.757621] Oops: 0000 [#1] SMP DEBUG_PAGEALLOC
      [ 1524.757637] Modules linked in: ctr ccm arc4 ath9k ath9k_common ath9k_hw ath snd_hda_codec_conexant mac80211 snd_hda_codec_generic snd_hda_intel snd_hda_controller snd_hda_codec bnep snd_hwdep rfcomm snd_pcm gpio_ich dell_wmi sparse_keymap snd_seq_midi hid_multitouch uvcvideo snd_seq_midi_event dell_laptop snd_rawmidi dcdbas snd_seq videobuf2_vmalloc videobuf2_memops videobuf2_core usbhid videodev snd_seq_device coretemp snd_timer hid joydev kvm_intel cfg80211 ath3k kvm btusb bluetooth serio_raw snd microcode soundcore lpc_ich wmi mac_hid parport_pc ppdev lp parport psmouse ahci libahci
      [ 1524.757825] CPU: 3 PID: 1911 Comm: intel-gpu-overl Tainted: G        W  OE 3.15.0-rc3+ #96
      [ 1524.757840] Hardware name: Dell Inc. Inspiron 1090/Inspiron 1090, BIOS A06 08/23/2011
      [ 1524.757855] task: f52f36c0 ti: f4cbc000 task.ti: f4cbc000
      [ 1524.757869] EIP: 0060:[<c1406982>] EFLAGS: 00210202 CPU: 3
      [ 1524.757884] EIP is at per_file_stats+0x12/0x100
      [ 1524.757896] EAX: 0000002d EBX: 00000000 ECX: f4cbdefc EDX: f53af700
      [ 1524.757909] ESI: c1406970 EDI: f53af700 EBP: f4cbde6c ESP: f4cbde5c
      [ 1524.757922]  DS: 007b ES: 007b FS: 00d8 GS: 0033 SS: 0068
      [ 1524.757934] CR0: 80050033 CR2: f53af748 CR3: 356af000 CR4: 000007f0
      [ 1524.757945] Stack:
      [ 1524.757957]  f4cbdefc 00000000 c1406970 f53af700 f4cbdea8 c12e5f15 f4cbdefc c1406970
      [ 1524.757993]  0000ffff f4cbde90 0000002d f5dc5cd0 e4e80438 c1181d59 f4cbded8 f4d89900
      [ 1524.758027]  f5631b40 e5131074 c1903f37 f4cbdf28 c14068e6 f52648a0 c1927748 c1903f37
      [ 1524.758062] Call Trace:
      [ 1524.758084]  [<c1406970>] ? i915_gem_object_info+0x510/0x510
      [ 1524.758106]  [<c12e5f15>] idr_for_each+0xa5/0x100
      [ 1524.758126]  [<c1406970>] ? i915_gem_object_info+0x510/0x510
      [ 1524.758148]  [<c1181d59>] ? seq_vprintf+0x29/0x50
      [ 1524.758168]  [<c14068e6>] i915_gem_object_info+0x486/0x510
      [ 1524.758189]  [<c11823a6>] seq_read+0xd6/0x380
      [ 1524.758208]  [<c116d11d>] ? final_putname+0x1d/0x40
      [ 1524.758227]  [<c11822d0>] ? seq_hlist_next_percpu+0x90/0x90
      [ 1524.758246]  [<c1163e52>] vfs_read+0x82/0x150
      [ 1524.758265]  [<c11645d6>] SyS_read+0x46/0x90
      [ 1524.758285]  [<c16b8d8c>] sysenter_do_call+0x12/0x22
      [ 1524.758298] Code: f5 8f 2a 00 83 c4 6c 31 c0 5b 5e 5f 5d c3 8d 74 26 00 8d bc 27 00 00 00 00 55 89 e5 57 56 53 83 ec 04 3e 8d 74 26 00 83 41 04 01 <8b> 42 48 01 41 08 8b 42 4c 89 d7 85 c0 75 07 8b 42 60 85 c0 74
      [ 1524.758461] EIP: [<c1406982>] per_file_stats+0x12/0x100 SS:ESP 0068:f4cbde5c
      [ 1524.758485] CR2: 00000000f53af748
      Reported-by: default avatarSam Jansen <sam.jansen@starleaf.com>
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Sam Jansen <sam.jansen@starleaf.com>
      Cc: stable@vger.kernel.org
      Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
      5b5ffff0
    • Rodrigo Vivi's avatar
      drm/i915: BDW: Adding Reserved PCI IDs. · fb7023e0
      Rodrigo Vivi authored
      These PCI IDs are reserved on BSpec and can be used at any time in the future.
      So let's add this now in order to avoid issues that we already faced on previous
      platforms, like finding out about new ids when user reported accelaration weren't
      enabled.
      
      Cc: stable@vger.kernel.org
      Reviewed-by: default avatarBen Widawsky <ben@bwidawsk.net>
      Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
      fb7023e0
    • Chris Wilson's avatar
      drm/i915: Only mark the ctx as initialised after a SET_CONTEXT operation · 967ab6b1
      Chris Wilson authored
      Fallout from
      
      commit 46470fc9
      Author: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Date:   Wed May 21 19:01:06 2014 +0300
      
          drm/i915: Add null state batch to active list
      
      undid the earlier fix of only marking the ctx as initialised after it is
      saved by the hardware during a SET_CONTEXT operation:
      
      commit ad1d2199
      Author: Ben Widawsky <benjamin.widawsky@intel.com>
      Date:   Sat Dec 28 13:31:49 2013 -0800
      
          drm/i915: set ctx->initialized only after RCS
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Cc: Damien Lespiau <damien.lespiau@intel.com>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Cc: Ben Widawsky <ben@bwidawsk.net>
      Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      Reviewed-by: default avatarBen Widawsky <ben@bwidawsk.net>
      [Jani: add reference to the earlier fix in the commit messsage.]
      Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
      967ab6b1
    • Rahul Sharma's avatar
      drm/exynos: stop mixer before gating clocks during poweroff · 381be025
      Rahul Sharma authored
      Mixer should be power gated only after it is gracefully stopped.
      The recommended sequence is to Stop the mixer and wait till
      it enters to IDLE state before gating the clocks and power to
      the mixer.
      Signed-off-by: default avatarRahul Sharma <rahul.sharma@samsung.com>
      Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
      381be025
    • Rahul Sharma's avatar
      drm/exynos: set power state variable after enabling clocks and power · b4bfa3c7
      Rahul Sharma authored
      Power state variable holds the state of the mixer device.
      Power on and power off functions are toggling these variable
      at wrong place.
      
      State variable should be changed to true only after Runtime
      PM and clocks are enabled. Else it may result to a situation
      where mixer registers are accessed with device power enabled.
      Similar logic for poweroff sequence.
      Signed-off-by: default avatarRahul Sharma <rahul.sharma@samsung.com>
      Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
      b4bfa3c7
    • Andrzej Hajda's avatar
      drm/exynos: disable unused windows on apply · d9b68d89
      Andrzej Hajda authored
      The patch disables non-enabled HW windows on applying
      configuration, it will allow to clear windows enabled
      by bootloader.
      Signed-off-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
      Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
      d9b68d89
    • Sachin Kamat's avatar
      drm/exynos: Fix de-registration ordering · 0013fc9e
      Sachin Kamat authored
      'exynos_drm_pdev' was not getting unregistered if platform_driver_register()
      failed. Fix the ordering to allow this. This also fixes the below warning by
      moving the #endif macro. While at it also fix the ordering in the exit function
      so that de-registration happens in opposite order of registration.
      drivers/gpu/drm/exynos/exynos_drm_drv.c:768:1: warning: label
      'err_unregister_pd' defined but not used [-Wunused-label]
      Signed-off-by: default avatarSachin Kamat <sachin.kamat@samsung.com>
      Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
      0013fc9e
    • Dan Carpenter's avatar
      drm/exynos: change zero to NULL for sparse · dcdffeda
      Dan Carpenter authored
      We recently changed this function to return a pointer instead of an int
      so we need to change this zero to a NULL or Sparse complains:
      
      	drivers/gpu/drm/exynos/exynos_drm_drv.h:346:47:
      	warning: Using plain integer as NULL pointer
      Signed-off-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
      Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
      dcdffeda
    • Tomasz Figa's avatar
      drm/exynos: dpi: Fix NULL pointer dereference with legacy bindings · aaa51b13
      Tomasz Figa authored
      If there is no panel node in DT and instead display timings are provided
      directly in FIMD node, there is no panel object created and ctx->panel
      becomes NULL. However during Exynos DRM initialization
      drm_helper_hpd_irq_event() is called, which in turns calls
      exynos_dpi_detect(), which dereferences ctx->panel without a check,
      causing a NULL pointer derefrence.
      
      This patch fixes the issue by adding necessary NULL pointer check.
      Signed-off-by: default avatarTomasz Figa <tomasz.figa@gmail.com>
      Reviewed-by: default avatarJingoo Han <jg1.han@samsung.com>
      Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
      aaa51b13
    • Inki Dae's avatar
      drm/exynos: hdmi: fix power order issue · 245f98f2
      Inki Dae authored
      This patch resolves page fault issue of Mixer when disabled.
      
      The SFRs of VP and Mixer are updated by Vertical Sync of Timing
      generator which is a part of HDMI so the sequence to disable TV
      Subsystem should be as following:
      	VP -> Mixer -> HDMI
      
      For this, this patch disables Mixer and VP (if used) prior to
      disabling HDMI.
      Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
      245f98f2
  6. 23 Jun, 2014 2 commits
  7. 22 Jun, 2014 8 commits