- 14 Jul, 2016 31 commits
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Alexandre Courbot authored
Handle and propagate secure boot errors. Failure to do so results in Nouveau incorrectly believing init has succeeded and a completely black display during boot. If we propagate the error, GR init will fail and the user will at least have a working display. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Some members were documented in the wrong structure. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Karol Herbst authored
it is a little help for hardware monitoring tools Signed-off-by: Karol Herbst <karolherbst@gmail.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Karol Herbst authored
We shouldn't set voltages below the min or above the max voltage the gpu is able to set, so save the range for future lookups. Signed-off-by: Karol Herbst <karolherbst@gmail.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Tested-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
This patch adds support for advanced features supported by the Noise-Aware PLL of Maxwell. Glitchless switch allows the PL field to be updated without disabling the PLL first if the SYNC_MODE bit of the CFG register is set. More significantly, DFS allows the PLL to monitor the actual input voltage and to dynamically lower the output frequency accordingly. This allows the clock to be more tolerant of lower voltages. These improvements are only supported for Tegra speedos >= 1. Also add the voltage table that is suitable for GM20B's NAPLL. This change needs to be done atomically for the right voltages to be used by the clock driver. v2. Fix build on non-Tegra platforms Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Strip the _ prefix off the gk20a clock constructor. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Split the MNP programming function into two functions for the cases where we allow sliding or not, instead of making it take a parameter for this. This results in less conditionals in the code and makes it easier to read. Also make the MNP programming functions take the PLL parameters as arguments, and move bits of code to more relevant places (previous programming tended to be just-in-time, which added more conditionnals in the code). Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Use a dedicated function instead of always calculating n_lo on the fly. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Make functions manipulating PLL settings take them as an argument, instead of assuming we want to work on the copy in the gk20a_clk structure. This makes these functions more flexible, which we will need in GM20B. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Add relevant functions to work with the gk20a_pll structure and use them where they ought to be instead of directly manipulating registers. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Move variables declarations to their actual scope of use, and simplify code a bit. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Slide setup needs to be performed only once, during init. Also use the proper parameters for different clock speeds. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Chips may be characterized for a minimum voltage. Support this extra parameter and select the appropriate minimum voltage for the detected GPU speedo. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Strip the _ prefix off the gk20a volt constructor. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Give a name to this constant so we at least get an idea of what it is for. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Nobody else is using these, so make them private. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
The GPU speedo ID is required to select the right clk/volt parameters on GM20B. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
There are cases where subdevs need to perform additonal actions around the master reset, so we want to expost the operations separately. This commit also adds a flag to the NV_PMC_ENABLE bitfield definitions which allow skipping the automatic reset() called from core/subdev.c. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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- 04 Jul, 2016 1 commit
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Dave Airlie authored
Merge tag 'asoc-hdmi-codec-pdata' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into drm-next ASoC: Add private data for HDMI CODEC callbacks Allow the HDMI CODECs to get private data passed in in callbacks. [airlied: Add STI/mediatek patches from Arnd for drivers merged later in drm tree.] Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Dave Airlie <airlied@redhat.com> * tag 'asoc-hdmi-codec-pdata' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound: ASoC: hdmi-codec: callback function will be called with private data
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- 02 Jul, 2016 3 commits
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http://git.agner.ch/git/linux-drm-fsl-dcuDave Airlie authored
The patchset contains a new helper in drm_fb_cma_helper.c for suspend/ resume when using cma backed framebuffers. * 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu: drm/fsl-dcu: disable vblank events on CRTC disable drm/fsl-dcu: implement suspend/resume using atomic helpers drm/fsl-dcu: use clk helpers drm/fsl-dcu: move layer initialization to plane file drm/fsl-dcu: store layer registers in soc_data drm/fb_cma_helper: add suspend helper
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Dave Airlie authored
Linux 4.7-rc5 The fsl-dcu pull needs -rc3 so go to -rc5 for now.
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Dave Airlie authored
Merge branch 'sti-drm-next-2016-06-30' of http://git.linaro.org/people/benjamin.gaignard/kernel into drm-next This pull request include 3 minors fix and one feature evolution around ASoC hdmi codec support. * 'sti-drm-next-2016-06-30' of http://git.linaro.org/people/benjamin.gaignard/kernel: drm: sti: Add ASoC generic hdmi codec support. drm/sti: adjust delay for AWG drm: sti: fix clocking issues in crtc drm/sti: Use 64-bit timestamps
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- 01 Jul, 2016 1 commit
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Arnaud Pouliquen authored
Add the interface needed by audio hdmi-codec driver. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
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- 27 Jun, 2016 4 commits
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Kuninori Morimoto authored
Current hdmi-codec driver is assuming that it will be registered from HDMI driver. Because of this assumption, each callback function has struct device pointer which is parent device (= HDMI). Then, it can use dev_get_drvdata() to get private data. OTOH, on some SoC/HDMI case, SoC has VIDEO/SOUND and HDMI IPs. This case, it needs SoC VIDEO, SoC SOUND and HDMI video, HDMI codec driver. In DesignWare HDMI IP case, SoC VIDEO (= DRM/KMS) driver tries to bind DesignWare HDMI video driver, and HDMI codec driver (= hdmi-codec). This case, above "parent device" of HDMI codec driver is DRM/KMS driver and its "device" already has private data. And, from DT and ASoC CPU/Codec/Card binding point of view, HDMI codec (= hdmi-codec) needs to have "parent device" (= DRM/KMS), otherwise, it never detect sound card. Because of these reasons, some driver can't use dev_get_drvdata() to get private data on hdmi-codec driver. This patch add new void pointer on hdmi_codec_pdata for private data, and callback function will be called with it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Bich Hemon authored
Compensate delay introduced by AWG IP during DE generation Signed-off-by: Bich Hemon <bich.hemon@st.com> Reviewed-by: Vincent ABRIOU <vincent.abriou@st.com>
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Benjamin Gaignard authored
fix and simplify clock management in crtc to avoid unbalanced call to clk_prepare_enable and clk_disable_unprepare functions remove unused functions Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
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Tina Ruchandani authored
'struct timespec' uses a 32-bit field for seconds, which will overflow in year 2038 and beyond. This patch is part of a larger attempt to remove instances of timeval, timespec and time_t, all of which suffer from the y2038 issue, from the kernel. Signed-off-by: Tina Ruchandani <ruchandani.tina@gmail.com>
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