1. 17 Apr, 2012 2 commits
    • Catalin Marinas's avatar
      ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on ASID-capable CPUs · 7fec1b57
      Catalin Marinas authored
      Since the ASIDs must be unique to an mm across all the CPUs in a system,
      the __new_context() function needs to broadcast a context reset event to
      all the CPUs during ASID allocation if a roll-over occurred. Such IPIs
      cannot be issued with interrupts disabled and ARM had to define
      __ARCH_WANT_INTERRUPTS_ON_CTXSW.
      
      This patch changes the check_context() function to
      check_and_switch_context() called from switch_mm(). In case of
      ASID-capable CPUs (ARMv6 onwards), if a new ASID is needed and the
      interrupts are disabled, it defers the __new_context() and
      cpu_switch_mm() calls to the post-lock switch hook where the interrupts
      are enabled. Setting the reserved TTBR0 was also moved to
      check_and_switch_context() from cpu_v7_switch_mm().
      Reviewed-by: default avatarWill Deacon <will.deacon@arm.com>
      Tested-by: default avatarWill Deacon <will.deacon@arm.com>
      Reviewed-by: default avatarFrank Rowand <frank.rowand@am.sony.com>
      Tested-by: default avatarMarc Zyngier <Marc.Zyngier@arm.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      7fec1b57
    • Will Deacon's avatar
      ARM: Use TTBR1 instead of reserved context ID · 3c5f7e7b
      Will Deacon authored
      On ARMv7 CPUs that cache first level page table entries (like the
      Cortex-A15), using a reserved ASID while changing the TTBR or flushing
      the TLB is unsafe.
      
      This is because the CPU may cache the first level entry as the result of
      a speculative memory access while the reserved ASID is assigned. After
      the process owning the page tables dies, the memory will be reallocated
      and may be written with junk values which can be interpreted as global,
      valid PTEs by the processor. This will result in the TLB being populated
      with bogus global entries.
      
      This patch avoids the use of a reserved context ID in the v7 switch_mm
      and ASID rollover code by temporarily using the swapper_pg_dir pointed
      at by TTBR1, which contains only global entries that are not tagged
      with ASIDs.
      Reviewed-by: default avatarFrank Rowand <frank.rowand@am.sony.com>
      Tested-by: default avatarMarc Zyngier <Marc.Zyngier@arm.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      [catalin.marinas@arm.com: add LPAE support]
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      3c5f7e7b
  2. 16 Apr, 2012 3 commits
    • Linus Torvalds's avatar
      Linux 3.4-rc3 · e816b57a
      Linus Torvalds authored
      e816b57a
    • Linus Torvalds's avatar
      Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm · 9a8e5d41
      Linus Torvalds authored
      Pull ARM fixes from Russell King:
       "Nothing too disasterous, the biggest thing being the removal of the
        regulator support for vcore in the AMBA driver; only one SoC was using
        this and it got broken during the last merge window, which then
        started causing problems for other people.  Mutual agreement was
        reached for it to be removed."
      
      * 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
        ARM: 7386/1: jump_label: fixup for rename to static_key
        ARM: 7384/1: ThumbEE: Disable userspace TEEHBR access for !CONFIG_ARM_THUMBEE
        ARM: 7382/1: mm: truncate memory banks to fit in 4GB space for classic MMU
        ARM: 7359/2: smp_twd: Only wait for reprogramming on active cpus
        ARM: 7383/1: nommu: populate vectors page from paging_init
        ARM: 7381/1: nommu: fix typo in mm/Kconfig
        ARM: 7380/1: DT: do not add a zero-sized memory property
        ARM: 7379/1: DT: fix atags_to_fdt() second call site
        ARM: 7366/3: amba: Remove AMBA level regulator support
        ARM: 7377/1: vic: re-read status register before dispatching each IRQ handler
        ARM: 7368/1: fault.c: correct how the tsk->[maj|min]_flt gets incremented
      9a8e5d41
    • Linus Torvalds's avatar
      x86-32: fix up strncpy_from_user() sign error · 12e993b8
      Linus Torvalds authored
      The 'max' range needs to be unsigned, since the size of the user address
      space is bigger than 2GB.
      
      We know that 'count' is positive in 'long' (that is checked in the
      caller), so we will truncate 'max' down to something that fits in a
      signed long, but before we actually do that, that comparison needs to be
      done in unsigned.
      
      Bug introduced in commit 92ae03f2 ("x86: merge 32/64-bit versions of
      'strncpy_from_user()' and speed it up").  On x86-64 you can't trigger
      this, since the user address space is much smaller than 63 bits, and on
      x86-32 it works in practice, since you would seldom hit the strncpy
      limits anyway.
      
      I had actually tested the corner-cases, I had only tested them on
      x86-64.  Besides, I had only worried about the case of a pointer *close*
      to the end of the address space, rather than really far away from it ;)
      
      This also changes the "we hit the user-specified maximum" to return
      'res', for the trivial reason that gcc seems to generate better code
      that way.  'res' and 'count' are the same in that case, so it really
      doesn't matter which one we return.
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      12e993b8
  3. 15 Apr, 2012 12 commits
  4. 14 Apr, 2012 13 commits
  5. 13 Apr, 2012 10 commits