- 08 May, 2015 3 commits
-
-
Michael Turquette authored
-
Sebastian Hesselbarth authored
When registering clk-si5351 by platform_data, we should not pass struct clk for the reference clocks. Drop struct clk from platform_data and rework the driver to use devm_clk_get of named clock references. While at it, check for at least one valid input clock and properly prepare/ enable valid reference clocks. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reported-by: Michael Welling <mwelling@ieee.org> Reported-by: Jean-Francois Moine <moinejf@free.fr> Reported-by: Russell King <rmk+linux@arm.linux.org.uk> Tested-by: Michael Welling <mwelling@ieee.org> Tested-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Michael Turquette <mturquette@linaro.org>
-
Sebastian Hesselbarth authored
Since the introduction of clk-si5351 the way we should deal with DT provided clocks has changed from indexed to named clock phandles. Amend the binding documentation to reflect named clock phandles by clock-names property. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
-
- 07 May, 2015 7 commits
-
-
git://linuxtv.org/snawrocki/samsungMichael Turquette authored
clk/samsung fixes for 4.1 - missing CONFIG_ARCH_EXYNOS5433 -> CONFIG_ARCH_EXYNOS substitution to actually enable clk-exynos5433.c compilation, - fixes of exynos5433 clk tree definitions: register offsetts, parent clocks, PLL coefficients, - fix for exynos5420 system sleep regression introduced in 3.19.
-
Sascha Hauer authored
Use 'clock-controller' and 'power-controller' as node names in the examples rather than the specific names of the units. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Stephen Boyd authored
We don't check to make sure the enable_lock is held across enable/disable and we don't check if the prepare_lock is held across prepare/unprepare. Add some asserts to catch any future locking problems. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Stephen Boyd authored
-
Geert Uytterhoeven authored
uart -> serial Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Linus Walleij authored
The APEATCLK and APETRACECLK are actually scaleable so register them as scaleable clocks. Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Felipe Balbi authored
clk_dump() will dump data about all clocks in JSON format, but it misses a newline character at the end of the JSON string. This patch adds that missing newline character. Signed-off-by: Felipe Balbi <balbi@ti.com> [sboyd@codeaurora.org: Squelch checkpatch with seq_puts()] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
- 06 May, 2015 14 commits
-
-
Dong Aisheng authored
Before commit 035a61c3 ("clk: Make clk API return per-user struct clk instances") we acquired the enable_lock in __clk_set_parent_{before,after}() by means of calling clk_enable(). After commit 035a61c3 we use clk_core_enable() in place of the clk_enable(), and clk_core_enable() doesn't acquire the enable_lock. This opens up a race condition between clk_set_parent() and clk_enable(). Fix it. Fixes: 035a61c3 ("clk: Make clk API return per-user struct clk instances") Cc: Mike Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Krzysztof Kozlowski authored
The platform_device_id is not modified by the driver and core uses it as const. Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Krzysztof Kozlowski authored
Staticize symbols not exported and not used outside of file. Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Krzysztof Kozlowski authored
Replace duplicated const keyword with proper array of const pointers to const strings. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Krzysztof Kozlowski authored
The array of parent names can be made as array of const pointers to const strings. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Krzysztof Kozlowski authored
The array of parent names can be made as array of const pointers to const strings. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Krzysztof Kozlowski authored
Add missing static to local (file-scope only) symbols. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Krzysztof Kozlowski authored
Add missing static to local (file-scope only) symbols. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Sascha Hauer authored
This adds the binding documentation for the apmixedsys, perisys and infracfg controllers found on Mediatek SoCs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
James Liao authored
This patch adds basic clocks for MT8173, including TOPCKGEN, PLLs, INFRA and PERI clocks. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Henry Chen <henryc.chen@mediatek.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
James Liao authored
This patch adds basic clocks for MT8135, including TOPCKGEN, PLLs, INFRA and PERI clocks. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Henry Chen <henryc.chen@mediatek.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Sascha Hauer authored
The pericfg and infracfg units also provide reset lines to several other SoC internal units. This adds a function which can be called from the pericfg and infracfg initialization functions which will register the reset controller using reset_controller_register. The reset controller will provide support for resetting the units connected to the pericfg and infracfg controller. The units resetted by this controller can use the standard reset device tree binding to gain access to the reset lines. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
James Liao authored
This patch adds common clock support for Mediatek SoCs, including plls, muxes and clock gates. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Henry Chen <henryc.chen@mediatek.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [sboyd@codeaurora.org: Squelch checkpatch warning in clk-mtk.h] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Sascha Hauer authored
The clk functions and structs declare the parent_name arrays as 'const char **parent_names' which means the parent name strings are const, but the array itself is not. Use 'const char * const * parent_names' instead which also makes the array const. This allows us to put the parent_name arrays into the __initconst section. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> [sboyd@codeaurora.org: Squelch 80-character checkpatch warnings] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
- 05 May, 2015 1 commit
-
-
Javier Martinez Canillas authored
Commit ae43b328 ("ARM: 8202/1: dmaengine: pl330: Add runtime Power Management support v12") added pm support for the pl330 dma driver but it makes the clock for the Exynos5420 MDMA0 DMA controller to be gated during suspend and this in turn makes its parent clock aclk266_g2d to be gated. But the clock needs to be ungated prior suspend to allow the system to be suspend and resumed correctly. Add GATE_BUS_TOP register to the list of registers to be restored when the system enters into a suspend state so aclk266_g2d will be ungated. Thanks to Abhilash Kesavan for figuring out that this was the issue. Fixes: ae43b328 ("ARM: 8202/1: dmaengine: pl330: Add runtime Power Management support v12") Cc: stable@vger.kernel.org # 3.19+ Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Kevin Hilman <khilman@linaro.org> Tested-by: Abhilash Kesavan <a.kesavan@samsung.com> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-
- 02 May, 2015 3 commits
-
-
Stephen Boyd authored
-
Krzysztof Kozlowski authored
The irq_domain_ops are not modified by the driver and the irqdomain core code accepts pointer to a const data. Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Stefan Wahren authored
key/value pairs in a JSON object must be separated by a comma. After adding the properties "accuracy" and "phase" the JSON output of /sys/kernel/debug/clk/clk_dump is invalid. So add the missing commas to fix it. Fixes: 5279fc40 ("clk: add clk accuracy retrieval support") Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> [sboyd@codeaurora.org: Added comment in function] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
- 01 May, 2015 2 commits
-
-
Georgi Djakov authored
The gfx3d_clk_src parents configuration is incorrect. Fix it. Fixes: 3966fab8 "clk: qcom: Add MSM8916 Global Clock Controller support" Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Georgi Djakov authored
One of the video codec clock frequencies has incorrect divider value. Fix it. Fixes: 3966fab8 "clk: qcom: Add MSM8916 Global Clock Controller support" Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
- 30 Apr, 2015 6 commits
-
-
Stephen Boyd authored
The debugfs clk directory no longer expresses a clk tree. Update the comments around that apporiately. Also drop comments about prepare locks needing to be held as we have the proper annotations with lockdep_assert_held(). Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Stephen Boyd authored
Move the code around so that we don't need to declare function prototypes at the start of the file. Simplify clk_core_is_prepared() and clk_core_is_enabled() too to make the diff easier to read. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Stephen Boyd authored
This condition can't ever be true because this function is static and it's always called with a non-NULL pointer. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Stephen Boyd authored
We don't need to print error messages when allocations fail. We'll get a nice backtrace in such situations anyway. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Dong Aisheng authored
These functions are only used in one place. Let's squash them into their respective callers to save some lines. Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com> [sboyd@codeaurora.org: Redo commit text, add NULL check in clk_enable()] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
Stephen Boyd authored
While introducing struct clk_core we tried to minimize the diff by changing the type of 'clk' variables from struct clk to struct clk_core without changing the names of the variables. Now that the split is complete, the code is slightly confusing when it mixes variables called 'clk' and variables called 'core' that are of the same type struct clk_core. Let's be consistent and use 'core' everywhere we have a struct clk_core pointer and 'clk' when we have a struct clk pointer. Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-
- 29 Apr, 2015 4 commits
-
-
Chanwoo Choi authored
This patch fixes the wrong PMS value of exynos5433_pll_rates table for {ATLAS|APOLLO|MEM0|MEM1|BUS|MFC|MPHY|G3D|DISP|ISP|_PLL. - 720 MHz (mdiv=360, pdiv=6, sdiv=1) -> 700 MHz (mdiv=175, pdiv=3, sdiv=1) - 350 MHz (mdiv=360, pdiv=6, sdiv=2) -> (mdiv=350, pdiv=6, sdiv=2) - 133 MHz (mdiv=552, pdiv=6, sdiv=4) -> (mdiv=532, pdiv=6, sdiv=4) Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-
Chanwoo Choi authored
This patch fixes the wrong parent clock of sclk_apollo clock from 'div_apollo_pll' to 'div_apollo2'. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-
Jonghwa Lee authored
CLK_PCLK_MONOTONIC_CNT clock had a wrong register assigned to it. The correct register is ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT. Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-
Jonghwa Lee authored
This patch fixes the wrong offoset of PCLK_MSCL_SECURE_SMMU_JPEG in CMU_MSCL domain. Fixes: b274bbfd (clk: samsung: exynos5433: Add clocks for CMU_MSCL domain) Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-