- 20 Oct, 2015 5 commits
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Javier Martinez Canillas authored
Use the AM33xx pinmux IOPAD macro to define the physical address instead of the offset from the padconf address. It makes the DTS easier to read since matches the addresses listed in the Technical Reference Manual. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Javier Martinez Canillas authored
Use the OMAP3 pinmux IOPAD macro to define the physical address instead of the offset from the padconf address. It makes the DTS easier to read since matches the addresses listed in the Technical Reference Manual. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Vignesh R authored
On am437x-gp-evm, pixcir_i2c_ts can wakeup the system from low power state via pinctrl and IO daisy chain using generic wakeirq framework. With commit 3fffd128 ("i2c: allow specifying separate wakeup interrupt in device tree") i2c core allows optional wakeirq to be specified via device tree. Add wakeup irq entry to enable pixcir_i2c_ts to wake the system from low power state. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Javier Martinez Canillas authored
I see that people are still sending emails to my old address (that no longer exists) since is the one mentioned in the IGEP DTS. Replace it with my current email address to avoid this. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Mugunthan V N authored
With the current implementation of GPIO hogging and with gpio-pcf857x is built as module, ethernet doesn't work on boot and doesn't throw any error/warning to user. Ethernet becomes operational when inserting gpio-pcf857x module, even this time there is no error/warning logs to user that ethernet is operational. When using with NFS rootfs and gpio-pcf857x as module, board doesn't boot as it doesn't get any ip address and doesn't throw any error/warning. To over come this, now cpsw driver tries to get mode-gpios. When gpio-pcf857x is built as module it will throw error, so that user can decide either to built in gpio-pcf857x to continue with nfs boot or choose alternate rootfs filesystem like sd/ramdisk. When using mmc/ramdisk as root fs, cpsw will probe defer and re-probes again when gpio-pcf857x module is inserted and ethernet becomes operational. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 16 Oct, 2015 3 commits
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Tony Lindgren authored
With omap5-board-common.dtsi, we can now easily add support for various omap5 board variants. Let's add minimal support for isee igepv5. So far I've tested that basic things work, such as serial, USB Ethernet, HDMI and WLAN. Note that like omap5-uevm, these boards seem to need to reserve 16MB for a trap section as in commit 03178c66 ("ARM: dts: omap5-evm: Update available memory to 2032 MB") and also noted in a u-boot commit at http://marc.info/?l=u-boot&m=134376852603255 and also at http://patchwork.ozlabs.org/patch/159881/. Not sure why this is not needed for omap5-cm-t54.dts, maybe because of different u-boot configuration. Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
Looks like thevarious omap5-uevm models and igepv5 are very similar. So let's create omap5-board-common.dtsi to allow fixing up things properly for mainline kernel to support all these. Even if we eventually end up having only PMIC + MMC + eMMC + SDIO WLAN + SATA + USB + HDMI configuration in the omap5-board-common.dtsi, this is the easiest way to add support for other boards rather than diffing various versions of out of tree dts files. My guess is that also omap5-sbc-t54.dts can use this, but I don't have that board so that will need to be dealt with later on. Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
Commit 99f84cae ("ARM: dts: add wl12xx/wl18xx bindings") added device tree bindings for the TI WLAN SDIO on many omap variants. I recall wondering how come omap5-uevm did not have the WLAN added and this issue has been bugging me for a while now, and I finally tracked it down to a bad pinmux regression, and a missing deferred probe handling for the 32k clock from palmas that's requested by twl6040. Basically 392adaf7 ("ARM: dts: omap5-evm: Add mcspi data") added pin muxing for mcspi4 that conflicts with the onboard WLAN. While some omap5-uevm don't have WLAN populated, the pins are not reused for other devices. And as the SDIO bus should be probed, let's try to enable WLAN by default. Let's fix the regression and add the WLAN configuration as done for the other boards in 99f84cae ("ARM: dts: add wl12xx/wl18xx bindings"). And let's use the new MMC pwrseq for the 32k clock as suggested by Javier Martinez Canillas <javier@dowhile0.org>. Note that without a related deferred probe fix for twl6040, the 32k clock is not initialized if palmas-clk is a module and twl6040 is built-in. Let's also use the generic "non-removable" instead of the legacy "ti,non-removable" property while at it. And finally, note that omap5 seems to require WAKEUP_EN for the WLAN GPIO interrupt. Fixes: 392adaf7 ("ARM: dts: omap5-evm: Add mcspi data") Cc: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 14 Oct, 2015 1 commit
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Laurent Pinchart authored
Use the macro instead of absolute register offsets to make the code more readable as the values now match register addresses from the datasheet. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 12 Oct, 2015 31 commits
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Mugunthan V N authored
As per mmc device tree binding documentation card detect gpio has to be active low signal. When a hardware is designed with active high card detect, gpio polarity has to be changed with cd-inverted dt property. In DRA74x, DRA72x and AM57xx EVMs the card detect gpio is designed as active low gpio. So correcting the dt card detect gpio definition. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Mugunthan V N authored
As per mmc device tree binding documentation card detect gpio has to be active low signal. When a hardware is designed with active high card detect, gpio polarity has to be changed with cd-inverted dt property. In AM43xx the card detect gpio is designed as active low gpio. So correcting the dt card detect gpio definition. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Mugunthan V N authored
As per mmc device tree binding documentation card detect gpio has to be active low signal. When a hardware is designed with active high card detect, gpio polarity has to be changed with cd-inverted dt property. In AM335x the card detect gpio is designed as active low gpio. So correcting the dt card detect gpio definition. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Laurent Pinchart authored
uart2 pinmux is already defined in omap3-igep0020-common.dtsi, remove the duplicate node. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Laurent Pinchart authored
Use tabs instead of spaces for indentation. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Javier Martinez Canillas authored
The card detect GPIO is using IRQ_TYPE_LEVEL_LOW in the GPIO flag cells but this defined constant is meant to be used for a IRQ and not a GPIO. So instead use GPIO_ACTIVE_LOW that seems to be the original intention. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Suman Anna authored
The DRA74x family of SoCs have a second DSP, that also has two MMUs just like the DSP1 subsystem. Add the IOMMU nodes for this DSP2 subsystem in disabled state to the DRA74x specific DTS file, the nodes would need to be enabled appropriately in the respective board DTS files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Suman Anna authored
The DRA7xx family of SOCs have two IPUs and one DSP processor subsystems in common. The IOMMU DT nodes have been added for these processor subsystems, and have been disabled by default. These MMUs are very similar to those on OMAP4 and OMAP5, with the only difference being the presence of a second MMU within the DSP subsystem for the EDMA port. The DSP IOMMUs also need an additional 'ti,syscon-mmuconfig' property compared to the IPU IOMMUs. NOTE: The enabling of these nodes is left to the respective board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Suman Anna authored
The DSP_SYSTEM sub-module is a dedicated system control logic module present within a DRA7 DSP processor sub-system. This module is responsible for power management, clock generation and connection to the device PRCM module. Add a syscon node for this module for the DSP2 processor sub-system. This is added as a syscon node as it is a common configuration module that can be used by the different IOMMU instances and the corresponding remoteproc device. The node is added to the dra74x.dtsi file, as the DSP2 processor subsystem is usually present only on the DRA74x variants of the DRA7 SoC family. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Suman Anna authored
The DSP_SYSTEM sub-module is a dedicated system control logic module present within a DRA7 DSP processor sub-system. This module is responsible for power management, clock generation and connection to the device PRCM module. Add a syscon node for this module for the DSP1 processor sub-system. This is added as a syscon node as it is a common configuration module that can be used by the different IOMMU instances and the corresponding remoteproc device. The node is added to the common dra7.dtsi file, as the DSP1 processor sub-system is mostly common across all the variants of the DRA7 SoC family. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Javier Martinez Canillas authored
Many OMAP2+ DTS are not using the defined constants to express the GPIO polarity. Replace these so the DTS are easier to read. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Robert Nelson authored
SeeedStudio BeagleBone Green (BBG) is clone of the BeagleBone Black (BBB) minus the HDMI port and addition of two Grove connectors (i2c2 and usart2). This board can be identified by the 1A value after A335BNLT (BBB) in the at24 eeprom: 1A: [aa 55 33 ee 41 33 33 35 42 4e 4c 54 1a 00 00 00 |.U3.A335BNLT....|] http://beagleboard.org/green http://www.seeedstudio.com/wiki/Beaglebone_greenSigned-off-by: Robert Nelson <robertcnelson@gmail.com> CC: Tony Lindgren <tony@atomide.com> CC: Jason Kridner <jkridner@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Suman Anna authored
Enable the System Mailboxes 5 and 6 and the corresponding child sub-mailbox (IPC 3.x) nodes for the Beagle X15 EVM boards. This is needed to enable communication with the respective remote processors IPU1, IPU2, DSP1 and DSP2 from the MPU. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Suman Anna authored
Enable the System Mailboxes 5 and 6 and the corresponding child sub-mailbox (IPC 3.x) nodes for the DRA72 EVM board. This is needed to enable communication with the respective remote processors IPU1, IPU2, and DSP1 from the MPU. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Suman Anna authored
Enable the System Mailboxes 5 and 6 and the corresponding child sub-mailbox (IPC 3.x) nodes for the DRA7 EVM board. This is needed to enable communication with the respective remote processors IPU1, IPU2, DSP1 and DSP2 from the MPU. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Suman Anna authored
Add the sub-mailbox nodes that are used to communicate between MPU and the remote processors IPU1, IPU2 and DSP1. These match the respective node definitions on DRA74x to maintain compatibility for the equivalent remote processors. There is no DSP2 on DRA72x, and so the corresponding sub-mailbox node is not added. These sub-mailbox nodes are added to match the hard-coded mailbox configuration used within the TI IPC 3.x software package. The Dual-Cortex M4 IPU1 and IPU2 processor sub-systems are assumed to be running in SMP-mode, and hence only a single sub-mailbox node is added for each. All these sub-mailbox nodes are left in disabled state, and should be enabled (and modified if needed) as per the individual product configuration in the corresponding board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Suman Anna authored
Add the sub-mailbox nodes that are used to communicate between MPU and the remote processors IPU1, IPU2, DSP1 and DSP2. The sub-mailbox nodes utilize the System Mailbox instances 5 and 6. These sub-mailbox nodes are added to match the hard-coded mailbox configuration used within the TI IPC 3.x software package. The Dual-Cortex M4 IPU1 and IPU2 processor sub-systems are assumed to be running in SMP-mode, and hence only a single sub-mailbox node is added for each. All these sub-mailbox nodes are left in disabled state, and should be enabled (and modified if needed) as per the individual product configuration in the corresponding board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Teresa Remmet authored
Cleaned up the regulators on the wega board. Created a simple bus, renamed the regulators according to the schematics and added missing regulator on wega. Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Grygorii Strashko authored
dra7-evm has 2 gpio keys wired through TS_LCD_GPIO3, TS_LCD_GPIO4 which in turn connected to PCF8575 GPIO pcf_lcd: gpio@20 expander pins 2 and 3. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Grygorii Strashko authored
dra7-evm has 4 user gpio leds connected to PCF8575 GPIO pcf_lcd: gpio@20 expander pins [4,5,6,7], so add corresponding DT nodes. Do not enable any triggers by default as not all of them are proved to work on -RT. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Grygorii Strashko authored
This patch adds DT definition for CF8575 GPIO pcf_lcd: gpio@20 expander which is connected to i2c bus 1 and has slave address 0x20. It allows to control: - tc_lcd gpios, pins p0-p3 - user leds, pins p4-p7 - control LCD panel power, p15 PCF8575 GPIO pcf_lcd: gpio@20 expander supports interrupt controller functionality and its INT line is connected to dra7 GPIO6.11 pin. Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Peter Ujfalusi authored
The analog audio setup consists of: McASP3 <-> tlv320aic3104 codec Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Peter Ujfalusi authored
The DVDD is supplied via TPS77018DBVT fixed regulator from vdd_3v3 Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Peter Ujfalusi authored
The board uses tlv320aic3106 codec connected to McASP3. The master clock for the codec and McASP3 is coming from ATL2. McASP3 is the master on the I2S bus. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Peter Ujfalusi authored
The GPIO expander's p1 on i2c5 bus 0x26 address is used for selecting between audio and VIN6 functionality. For VIN6 use an add on card is needed while audio is present on the board itself. Select the audio functionality over the VIN6 in the dts file. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Peter Ujfalusi authored
The DVDD is supplied via TPS77018DBVT fixed regulator from evm_3v3 Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Peter Ujfalusi authored
The board uses tlv320aic3106 codec connected to McASP3. The master clock for the codec and McASP3 is coming from ATL2. McASP3 is the master on the I2S bus. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Peter Ujfalusi authored
This GPIO expander is used for controlling various muxes on the board. By default select audio functionality over VIN6 by setting the P1 (vin6_sel_s0) pin to low. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Peter Ujfalusi authored
TPS77018DBVT is used to create 1.8V from avm_3v3_sw's 3.3V connected to aic3106's DVDD. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Peter Ujfalusi authored
Use the name for the supply as it is in the schematics since the same supply is used for other peripherals than MMC2, like audio. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Peter Ujfalusi authored
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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