- 11 Apr, 2019 5 commits
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Alexandre Belloni authored
pcf85363->dev is unused, remove it. Signed-off-by:Alexandre Belloni <alexandre.belloni@bootlin.com>
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Alexandre Belloni authored
Use SPDX-License-Identifier instead of a verbose license text. Signed-off-by: -
Alexandre Belloni authored
Use .set_time instead of the deprecated .set_mmss. Signed-off-by: -
Alexandre Belloni authored
Call the 64bit versions of rtc_tm time conversion now that the range is enforced by the core. Signed-off-by: -
Alexandre Belloni authored
From the datasheet: "HW_RTC_SECONDS provides access to the 32-bit real-time seconds counter." Signed-off-by:
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- 08 Apr, 2019 16 commits
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Alexandre Belloni authored
Use SPDX-License-Identifier instead of a verbose license text. Acked-by:
Thierry Reding <treding@nvidia.com> Signed-off-by:
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Alexandre Belloni authored
Call the 64bit versions of rtc_tm time conversion now that the range is enforced by the core. Acked-by:
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Alexandre Belloni authored
The Tegra 20 RTC is a 32bit seconds counter (with an unused millisecond counter). Acked-by:
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Alexandre Belloni authored
Use SPDX-License-Identifier instead of the custom license line. Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Alexandre Belloni authored
Use .set_time instead of the deprecated .set_mmss. Acked-by:
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Alexandre Belloni authored
Call the 64bit versions of rtc_tm time conversion now that the range is enforced by the core. Acked-by:
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Alexandre Belloni authored
The COH 901 331 is a 32bit seconds counter. Acked-by:
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Alexandre Belloni authored
Use %ptR to simplify debug message. Signed-off-by: -
Alexandre Belloni authored
Use SPDX-License-Identifier instead of a verbose license text. Signed-off-by: -
Alexandre Belloni authored
Use .set_time instead of the deprecated .set_mmss. Signed-off-by: -
Alexandre Belloni authored
Use the 64bit version of rtc_time_to_tm.rtc_time_to_tm. Signed-off-by: -
Alexandre Belloni authored
ds1672_get_datetime and ds1672_set_mmss are only used after casting dev to an i2c_client. Remove that useless indirection. Signed-off-by: -
Alexandre Belloni authored
Remove the control sysfs file as it is not documented, read only and was only used to provide the oscillator state. Signed-off-by: -
Alexandre Belloni authored
Return -EINVAL when trying to read an invalid time instead of just probe because this is a useful information for userspace. Signed-off-by: -
Alexandre Belloni authored
The ds1672 is a 32bit seconds counter. Also remove erroneous comment claiming that epoch is set to 2000, it was not. Signed-off-by: -
Alexandre Belloni authored
Use .set_time instead of the deprecated .set_mmss64. Signed-off-by:
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- 06 Apr, 2019 1 commit
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Xuefeng Wang authored
When setting rtc alarm (RTC_WKALM_SET), the tm_year is not checked if it is in suiteable range. Use INT_MAX - 1900 to check it. UBSAN: Undefined behaviour in drivers/rtc/rtc-lib.c:119:30 signed integer overflow: 2147483647 + 1900 cannot be represented in type 'int' CPU: 1 PID: 20994 Comm: syz-executor0 Not tainted 4.19.18-514.55.6.9.x86_64 + #1 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.10.2-1ubuntu1 04/01/2014 Call Trace: __dump_stack lib/dump_stack.c:77 [inline] dump_stack+0xca/0x13e lib/dump_stack.c:113 ubsan_epilogue+0xe/0x81 lib/ubsan.c:159 handle_overflow+0x193/0x1e2 lib/ubsan.c:190 rtc_tm_to_time64+0x267/0x280 drivers/rtc/rtc-lib.c:119 rtc_tm_to_ktime+0x16/0x70 drivers/rtc/rtc-lib.c:129 rtc_set_alarm+0x1a9/0x2d0 drivers/rtc/interface.c:466 rtc_dev_ioctl+0x6db/0x810 drivers/rtc/rtc-dev.c:380 vfs_ioctl fs/ioctl.c:46 [inline] do_vfs_ioctl+0x1a5/0x10b0 fs/ioctl.c:690 ksys_ioctl+0x89/0xa0 fs/ioctl.c:705 __do_sys_ioctl fs/ioctl.c:712 [inline] __se_sys_ioctl fs/ioctl.c:710 [inline] __x64_sys_ioctl+0x74/0xb0 fs/ioctl.c:710 do_syscall_64+0xc8/0x580 arch/x86/entry/common.c:290 entry_SYSCALL_64_after_hwframe+0x49/0xbe RIP: 0033:0x462589 Code: f7 d8 64 89 02 b8 ff ff ff ff c3 66 0f 1f 44 00 00 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 c7 c1 bc ff ff ff f7 d8 64 89 01 48 RSP: 002b:00007f5348896c58 EFLAGS: 00000246 ORIG_RAX: 0000000000000010 RAX: ffffffffffffffda RBX: 000000000072bf00 RCX: 0000000000462589 RDX: 0000000020000000 RSI: 000000004028700f RDI: 0000000000000003 RBP: 0000000000000003 R08: 0000000000000000 R09: 0000000000000000 R10: 0000000000000000 R11: 0000000000000246 R12: 00007f53488976bc R13: 00000000004bf67e R14: 00000000006f96e0 R15: 00000000ffffffff ========================================================================== Signed-off-by:
Xuefeng Wang <wxf.wang@hisilicon.com> Signed-off-by:
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- 04 Apr, 2019 18 commits
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Wolfram Sang authored
The mentioned function pointer is long gone since early 2011. Remove the reference in the comment and reword it slightly. Fixes: 51ba60c5 ("RTC: Cleanup rtc_class_ops->update_irq_enable()") Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by:
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Alexandre Belloni authored
Remove the unused "depends on I2C" as the config options are already guarded by if I2C. Signed-off-by: -
Alexandre Belloni authored
Allow reading the oscillator status bit. Also allow clearing it even if that makes little sense and can't be done in a race free way. Signed-off-by: -
Alexandre Belloni authored
The PCF850363 has an offset correction with two modes: With mode 0, the correction is triggered once every two hours and then correction pulses are applied once per minute until the programmed correction values have been implemented. This gives a step of 4.34 ppm. With mode 1, the correction is triggered once every four minutes and then correction pulses are applied once per second up to a maximum of 60 pulses. When correction values greater than 60 pulses are used, additional correction pulses are made in the 59 th second. This gives a step of 4.069 ppm. Use the correction closest to the requested value. Signed-off-by: -
Alexandre Belloni authored
The pcf85063 has one byte of nvram. Signed-off-by: -
Alexandre Belloni authored
The Micro Crystal RV8263 has the same IC as the pcf85063 but has an on board crystal. This means that the CAP_SEL bit has to be cleared so the correct capacitance is selected for the crystal. Signed-off-by: -
Alexandre Belloni authored
Add support for the alarms. The match on the weekday is not used as it it not necessarily properly set. The tested RTC shows a behaviour where setting an alarm on the second right after an alarm that fired is not working, probably because of the circuit that ensures an alarm only fires once. This is why uie_unsupported is set. Signed-off-by: -
Alexandre Belloni authored
As stated in a comment pcf85063a and pcf85063tp don't have the same number of registers. Especially, pcf85063tp doesn't have alarm support. Signed-off-by: -
Alexandre Belloni authored
Switch to regmap to simplify register accesses and remove the need for pcf85063_stop_clock/pcf85063_start_clock. Signed-off-by: -
Alexandre Belloni authored
This is a standard BCD RTC that will fail in 2100. Signed-off-by: -
Alexandre Belloni authored
This allows further improvement of the driver. Signed-off-by: -
Alexandre Belloni authored
Only smbus reads and write are done in the driver, plain i2c functionality is not required. Signed-off-by: -
Alexandre Belloni authored
Use SPDX-License-Identifier instead of a verbose license text. Signed-off-by: -
Alexandre Belloni authored
struct i2c_device_id argument of probe() is not used, so use probe_new() instead. Signed-off-by: -
Anson Huang authored
Use the new helper devm_platform_ioremap_resource() which wraps the platform_get_resource() and devm_ioremap_resource() together, to simplify the code. Signed-off-by:
Anson Huang <Anson.Huang@nxp.com> Signed-off-by:
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Anson Huang authored
Use the new helper devm_platform_ioremap_resource() which wraps the platform_get_resource() and devm_ioremap_resource() together, to simplify the code. Signed-off-by:
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Anson Huang authored
With calling dev_pm_set_wake_irq() to set SNVS RTC as wakeup source for suspend, generic wake irq mechanism will automatically enable it as wakeup source when suspend, then the suspend/resume callback which are ONLY for enabling/disabling irq wake can be removed, it simplifies the code. Signed-off-by:
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Joel Stanley authored
Read and writes the time to the non-battery backed RTC in the ASPEED BMC system on chip families. Signed-off-by:
Joel Stanley <joel@jms.id.au> Signed-off-by:
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