- 19 Sep, 2011 15 commits
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Emmanuel Grumbach authored
When a non-empty Tx queueis freed, the buffer it contains must be freed too. Since the Tx cmd are now allocated from a pool, the Tx cmd must be freed too. This patch avoids to destroy a non-empty pool of Tx cmd. Signed-off-by:
Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by:
Wey-Yi Guy <wey-yi.w.guy@intel.com> Signed-off-by:
John W. Linville <linville@tuxdriver.com>
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Emmanuel Grumbach authored
If the driver is unloaded while there is still a host command in flight, its tfd will be freed by iwl_tx_queue_free. This function is called for both types of queues: Tx queues and cmd queue. This didn't take in count the fact that in Tx queues, tfds are mapped as TO_DEVICE (besides the first TB), whereas in cmd queue, all TBs are mapped as BIDI. Hence, tx_queue_free unmapped the second (and higher) TB of each tfd in the cmd queue as TO_DEVICE, whereas they must be freed as BIDI. This means that if a multi TFD is in flight while we unload the driver (which is quite unlikely but can happen), we will get the warning below. This patch fixes this. [ 445.234060] ------------[ cut here ]------------ [ 445.236273] WARNING: at lib/dma-debug.c:861 check_unmap+0x337/0x780() [ 445.236654] iwlagn 0000:02:00.0: DMA-API: device driver frees DMA memory with different direction [device address=0x0000000126950540] [size=8 bytes] [mapped with DMA_BIDIRECTIONAL] [unmapped with DMA_TO_DEVICE] [ 445.236654] Modules linked in: ... [ 445.236654] Pid: 1415, comm: modprobe Not tainted 3.1.0-rc4-wl-65912-g5215ff1-dirty #79 [ 445.236654] Call Trace: [ 445.236654] [<ffffffff81043a51>] warn_slowpath_common+0x71/0xa0 [ 445.236654] [<ffffffff81043b37>] warn_slowpath_fmt+0x47/0x50 [ 445.236654] [<ffffffff8121e687>] check_unmap+0x337/0x780 [ 445.236654] [<ffffffff810e9136>] ? free_one_page+0x156/0x320 [ 445.236654] [<ffffffff8121ec5a>] debug_dma_unmap_page+0x5a/0x60 [ 445.236654] [<ffffffffa021d701>] iwlagn_unmap_tfd.isra.11+0x121/0x1c0 [iwlagn] [ 445.236654] [<ffffffffa021ddf2>] iwlagn_txq_free_tfd+0x42/0x70 [iwlagn] [ 445.236654] [<ffffffffa02121de>] iwl_tx_queue_unmap+0x4e/0x70 [iwlagn] [ 445.236654] [<ffffffffa0212fad>] iwl_trans_pcie_tx_free+0x10d/0x440 [iwlagn] [ 445.236654] [<ffffffff81064959>] ? destroy_workqueue+0xb9/0x1e0 [ 445.236654] [<ffffffffa021330a>] iwl_trans_pcie_free+0x2a/0x2c0 [iwlagn] [ 445.236654] [<ffffffffa022f4f2>] iwl_remove+0x149/0x17e [iwlagn] [ 445.236654] [<ffffffffa022f546>] iwl_pci_remove+0x1f/0x65 [iwlagn] [ 445.236654] [<ffffffff81228337>] pci_device_remove+0x47/0x120 [ 445.236654] [<ffffffff8134566c>] __device_release_driver+0x7c/0xe0 [ 445.236654] [<ffffffff81345dc8>] driver_detach+0xc8/0xd0 [ 445.236654] [<ffffffff813454c8>] bus_remove_driver+0x88/0xe0 [ 445.236654] [<ffffffff81346572>] driver_unregister+0x62/0xa0 [ 445.236654] [<ffffffff812271d4>] pci_unregister_driver+0x44/0xc0 [ 445.236654] [<ffffffffa0211ce5>] iwl_pci_unregister_driver+0x15/0x20 [iwlagn] [ 445.236654] [<ffffffffa022f595>] iwl_exit+0x9/0xa74 [iwlagn] [ 445.236654] [<ffffffff810918f4>] sys_delete_module+0x184/0x240 [ 445.236654] [<ffffffff81452ece>] ? retint_swapgs+0xe/0x13 [ 445.236654] [<ffffffff8121098e>] ? trace_hardirqs_on_thunk+0x3a/0x3f [ 445.236654] [<ffffffff81459e2b>] system_call_fastpath+0x16/0x1b [ 445.236654] ---[ end trace 1fbc362b7dbe5d74 ]--- [ 445.236654] Mapped at: [ 445.236654] [<ffffffff8121d7cb>] debug_dma_map_page+0x8b/0x150 [ 445.236654] [<ffffffffa021e7b7>] iwl_enqueue_hcmd+0x837/0xa40 [iwlagn] [ 445.236654] [<ffffffffa021f92d>] iwl_trans_pcie_send_cmd+0x8d/0x580 [iwlagn] [ 445.236654] [<ffffffffa01f7c75>] iwl_send_calib_results+0x75/0xd0 [iwlagn] [ 445.236654] [<ffffffffa01f21f6>] iwlagn_alive_notify+0x196/0x1f0 [iwlagn] [ 445.386500] iwlagn 0000:02:00.0: PCI INT A disabled Reported-by:
Johannes Berg <johannes.berg@intel.com> Signed-off-by:
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Emmanuel Grumbach authored
The way we check if there is host command that should be reclaimed is way too complicated. We should have a clear indication from the fw. The fw is expected to set the SEQ_RX_FRAME bit if the frame was originated by the fw which indicates to the driver that there is no host command to free. Somehow, there seem to have been buggy fw out there, hence the very old comment. This code checks if we have still buggy fw out there. Signed-off-by:
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Rajkumar Manoharan authored
Not doing so, the caldata continues to retain older history values learned on that channel. It is always safer to start noise floor calibration from the defaults after the assoication. So this patch resets the nf history buffer when none of the STA vifs are associated. Signed-off-by:
Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by:
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Rajkumar Manoharan authored
Currently during the full reset, the nf calibration is always restarted from the defaults. The noise floor history buffers are never be used again after the scan and ath reset. This patch ensures that nf histories are always be used that helps to improve the signal quality on congested environment Signed-off-by:
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Rajkumar Manoharan authored
Do the magnitude/phase coeff correction only if the outlier is detected. Updating wrong magnitude/phase coeff factor impacts not only tx gain setting but also leads to poor performance in congested networks. In the clear environment the impact is very minimal because the outlier happens very rarely according to the past experiment. It occured less than once every 1000 calibrations. Cc: stable@kernel.org Signed-off-by:
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Felix Fietkau authored
AR913x uses the same PLL register layout as AR9160 and later. Signed-off-by:
Felix Fietkau <nbd@openwrt.org> Signed-off-by:
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Felix Fietkau authored
ath9k_hw_set_diversity is only called from init.c where it cannot affect the hardware setting because it's cleared on the next reset. Instead of using a PHY op for something that's supposed to be initialized statically, set the register value directly in the INI override function. Signed-off-by:
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Felix Fietkau authored
The eeprom .set_addac function is only necessary for AR9160, remove it from eeprom_4k.c and remove the dummy function from eeprom_9287.c Signed-off-by:
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Felix Fietkau authored
- AR_SREV_5416_20_OR_LATER is always true, remove it - AR_SREV_9280_20_OR_LATER is always true within eeprom_4k.c and eeprom_9287.c - (AR_SREV_9271 || AR_SREV_9285) is always true in eeprom_4k.c Signed-off-by:
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Felix Fietkau authored
Signed-off-by:
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Eliad Peller authored
Add function to find vendor-specific ie (along with vendor-specific ie struct definition and P2P OUI values) Signed-off-by:
Eliad Peller <eliad@wizery.com> Reviewed-by:
Johannes Berg <johannes@sipsolutions.net> Signed-off-by:
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Felix Fietkau authored
When the driver inserts padding between the 802.11 header and data, it needs to set the hdr variable to the new header location. Signed-off-by:
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John W. Linville authored
This reverts commit 4245d313.
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- 16 Sep, 2011 25 commits
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Kalle Valo authored
It's not in staging anymore and I'm the current maintainer. Cc: Luis R. Rodriguez <mcgrof@gmail.com> Cc: Naveen Singh <nvesing@qca.qualcomm.com> Signed-off-by:
Kalle Valo <kvalo@qca.qualcomm.com> Signed-off-by:
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Felix Fietkau authored
Signed-off-by:
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Felix Fietkau authored
With the new EDMA descriptor format, a single descriptor can contain up to four buffer pointers. By splitting the buffer into two parts, we can let the hardware add the padding internally instead of using memmove on the skb data. Signed-off-by:
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Felix Fietkau authored
The only flag that needs to be set when ath_tx_rc_status is called with rc_update == false is the IEEE80211_TX_STAT_TX_FILTERED flag. All other data is ignored in that case. This flag can be set from ath_tx_complete_buf instead, so that we can drop a few redundant calls to ath_tx_rc_status and remove the rc_update function parameter Signed-off-by:
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Felix Fietkau authored
ath_lookup_legacy now checks all the tx rate flags for MCS vs legacy Signed-off-by:
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Felix Fietkau authored
ath_hw_cycle_counters_update only needs to be called if the power state changes. Most of the time this does not happen, even when ps_usecount goes down to 0. Signed-off-by:
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Felix Fietkau authored
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Felix Fietkau authored
With the new API, tx descriptors can be written in one single pass instead of having to re-read and rewrite fields from multiple places. This makes the code easier to read and also slightly improves performance on embedded MIPS hardware. Signed-off-by:
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Felix Fietkau authored
Instead of using lots of different functions with long argument lists, pull all the necessary information from one struct. This makes the code easier to read and eliminates the need for copying data between multiple linked descriptors. Signed-off-by:
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Felix Fietkau authored
Reduces the number of accesses to uncached descriptor memory. Signed-off-by:
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Felix Fietkau authored
This ensures that only ath9k_hw_set_desc_link needs to recalculate the tx descriptor checksum on AR9380+ Signed-off-by:
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Felix Fietkau authored
Signed-off-by:
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Felix Fietkau authored
Makes it easier to clean up the ath9k_hw descriptor API Signed-off-by:
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Felix Fietkau authored
Signed-off-by:
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Felix Fietkau authored
During a reset, rx buffers are flushed after rx has been disabled. To avoid race conditions, rx needs to stay disabled during the reset, so avoid any calls to ath9k_hw_rxena in that case. Signed-off-by:
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Felix Fietkau authored
When starting the AP beacon timer, it assumes that the TSF has recently been cleared. Set the SC_OP_TSF_RESET flag to ensure that this is always the case. Signed-off-by:
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Felix Fietkau authored
The interrupt handler increases the interrupt disable refcount, so the tasklet needs to always call ath9k_hw_enable_interrupts. Signed-off-by:
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Mohammed Shafi Shajakhan authored
in ath_pci_resume it seems we are not enabling LED properly, in addition we have a PS wrapper fix for this Signed-off-by:
Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com> Signed-off-by:
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Mohammed Shafi Shajakhan authored
now the LED starts working for AR946/8x chipsets Cc: "Balasubramanian, senthilkumar" <senthilb@qca.qualcomm.com> Signed-off-by:
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Rajkumar Manoharan authored
AR9003 seems to have issues sometimes with fast channel change in 5GHz and this case is handled specifically for AR9280 by doing a full reset. Let's do a full reset for 5GHz channles of AR9380 & for all channels of AR9280 pci chips. Signed-off-by:
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Senthil Balasubramanian authored
Move the register macros to appropriate header files to be in sync with other register definitions and also a single place to refer everything. Signed-off-by:
Senthil Balasubramanian <senthilb@qca.qualcomm.com> Signed-off-by:
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Senthil Balasubramanian authored
This patch adds support for AR946/8x chipets. Signed-off-by:
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Senthil Balasubramanian authored
Split tx/rx gain table initval hanlding part so readability is better and easy to manage the code. Signed-off-by:
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Senthil Balasubramanian authored
Add initvals and register modifications required to support AR946/8x chipsets. Signed-off-by:
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Eliad Peller authored
Add/fix some missing docs. Signed-off-by:
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