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- 27 Jul, 2020 9 commits
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Michael Chan authored
Now we can report all the full 64-bit CPU endian software accumulated counters instead of the hw counters, some of which may be less than 64-bit wide. Define the necessary macros to access the software counters. Reviewed-by:
Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by:
Michael Chan <michael.chan@broadcom.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Michael Chan authored
Now that we have the infrastructure in place, add the new function bnxt_accumulate_all_stats() to periodically accumulate and check for counter rollover of all ring stats and port stats. A chip bug was also discovered that could cause some ring counters to become 0 during DMA. Workaround by ignoring zeros on the affected chips. Some older frimware will reset port counters during ifdown. We need to check for that and free the accumulated port counters during ifdown to prevent bogus counter overflow detection during ifup. Reviewed-by:
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Michael Chan authored
If supported by newer firmware, make the firmware call to query all the port counter masks. If not supported, assume 40-bit port counter masks. Reviewed-by:
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Michael Chan authored
Newer firmware has a new call HWRM_FUNC_QSTATS_EXT to retrieve the masks of all ring counters. Make this call when supported to initialize the hardware masks of all ring counters. If the call is not available, assume 48-bit ring counter masks on P5 chips. Reviewed-by:
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Michael Chan authored
Some of these DMAed hardware counters are not full 64-bit counters and so we need to accumulate them as they overflow. Allocate copies of these DMA statistics memory blocks with the same size for accumulation. The hardware counter widths are also counter specific so we allocate memory for masks that correspond to each counter. Reviewed-by:
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Michael Chan authored
The driver manages multiple statistics structures of different sizes. They are all allocated, freed, and handled practically the same. Define a new bnxt_stats_mem structure and common allocation and free functions for all staistics memory blocks. Reviewed-by:
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Michael Chan authored
The port statistics structures have hard coded padding and offset. Define macros to make this look cleaner. Reviewed-by:
Pavan Chebbi <pavan.chebbi@broadcom.com> Reviewed-by:
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Michael Chan authored
Main changes are 200G support and fixing the definitions of discard and error counters to match the hardware definitions. Because the HWRM_PORT_PHY_QCFG message size has now exceeded the max. encapsulated response message size of 96 bytes from the PF to the VF, we now need to cap this message to 96 bytes for forwarding. The forwarded response only needs to contain the basic link status and speed information and can be capped without adding the new information. v2: Fix bnxt_re compile error. Cc: Selvin Xavier <selvin.xavier@broadcom.com> Reviewed-by:
Edwin Peer <edwin.peer@broadcom.com> Signed-off-by:
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Vasundhara Volam authored
Remove PCIe non-counters display from ethtool statistics, as they are not simple counters but register dump. The next few patches will add logic to detect counter roll-over and it won't work with these PCIe non-counters. There will be a follow up patch to get PCIe information via ethtool register dump. Signed-off-by:
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- 18 Jul, 2020 1 commit
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Jakub Kicinski authored
The fact that NETIF_F_HW_TC is not set should be a sufficient indication to the user that TC offloads are not supported. No need to bother users of older firmware versions with pointless warnings on every boot. Also, since the support is optional, bnxt_init_tc() should not return an error in case FW is old, similarly to how error is not returned when CONFIG_BNXT_FLOWER_OFFLOAD is not set. With that we can add an error message to the caller, to warn about actual unexpected failures. Signed-off-by:
Jakub Kicinski <kuba@kernel.org> Reviewed-by:
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- 12 Jul, 2020 2 commits
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Michael Chan authored
The current completion ring sizing formula is wrong with TPA enabled. The formula assumes that the number of TPA completions are bound by the RX ring size, but that's not true. TPA_START completions are immediately recycled so they are not bound by the RX ring size. We must add bp->max_tpa to the worst case maximum RX and TPA completions. The completion ring can overflow because of this mistake. This will cause hardware to disable the completion ring when this happens, leading to RX and TX traffic to stall on that ring. This issue is generally exposed only when the RX ring size is set very small. Fix the formula by adding bp->max_tpa to the number of RX completions if TPA is enabled. Fixes: c0c050c5 ("bnxt_en: New Broadcom ethernet driver."); Reviewed-by:
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Vasundhara Volam authored
In a shared port PHY configuration, async event is received when any of the port modifies the configuration. Ethtool link settings should be initialised after updated PHY configuration from firmware. Fixes: b1613e78 ("bnxt_en: Add async. event logic for PHY configuration changes.") Signed-off-by:
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- 10 Jul, 2020 1 commit
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Jakub Kicinski authored
Convert to new infra, taking advantage of sleeping in callbacks. v2: - use bp->*_fw_dst_port_id != INVALID_HW_RING_ID as indication that the offload is active. Signed-off-by:
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- 08 Jul, 2020 7 commits
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Edwin Peer authored
Bare-metal use cases require giving firmware and the embedded application processor control over VLAN offloads. The driver should not attempt to override or utilize this feature in such scenarios since it will not work as expected. Signed-off-by:
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Edwin Peer authored
The hardware VLAN offload feature on our NIC does not have separate knobs for handling customer and service tags on RX. Either offloading of both must be enabled or both must be disabled. Introduce definitions for the combined feature set in order to clean up the code and make this constraint more clear. Technically these features can be separately enabled on TX, however, since the default is to turn both on, the combined TX feature set is also introduced for code consistency. Signed-off-by:
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Michael Chan authored
With the new infrastructure in place, we can now support the setting of the indirection table from ethtool. When changing channels, in a rare case that firmware cannot reserve the rings that were promised, we will still try to keep the RSS map and only revert to default when absolutely necessary. v4: Revert RSS map to default during ring change only when absolutely necessary. v3: Add warning messages when firmware cannot reserve the requested RX rings, and when the RSS table entries have to change to default. v2: When changing channels, if the RSS table size changes and RSS map is non-default, return error. Signed-off-by: -
Michael Chan authored
Now that we have the logical table, we can fill the HW RSS table using the logical table's entries and converting them to the HW specific format. Re-initialize the logical table to standard distribution if the number of RX rings changes during ring reservation. v4: Use bnxt_get_rxfh_indir_size() to get the RSS table size. v2: Use ALIGN() to roundup the RSS table size. Signed-off-by:
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Michael Chan authored
On some chips, this varies based on the number of RX rings. Add this helper function and refactor the existing code to use it. Signed-off-by:
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Michael Chan authored
The driver currently does not keep track of the logical RSS indirection table. The hardware RSS table is set up with standard default ring distribution when initializing the chip. This makes it difficult to support user sepcified indirection table entries. As a first step, add the logical table in the main bnxt structure and allocate it according to chip specific table size. Add a function that sets up default RSS distribution based on the number of RX rings. v4: Use bnxt_get_rxfh_indir_size() for the current RSS table size. v2: Use kmalloc_array() since we init. all entries afterwards. Use ALIGN() to roundup the RSS table size. Use ethtool_rxfh_indir_default() to init. the default entries. Signed-off-by: -
Michael Chan authored
Currently, we allocate one page for the hardware DMA RSS indirection table. While the size is currently big enough for all chips, future chip variations may support bigger sizes, so it is better to calculate and store the chip specific size and allocate accordingly. Signed-off-by:
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- 24 Jun, 2020 4 commits
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Vasundhara Volam authored
Virtual functions does not have VPD information. This patch modifies calling bnxt_read_vpd_info() only for PFs and avoids an unnecessary error log. Fixes: a0d0fd70 ("bnxt_en: Read partno and serialno of the board from VPD") Signed-off-by:
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Michael Chan authored
On older firmware, the hardware statistics are not cleared when the driver frees the hardware stats contexts during ifdown. The driver expects these stats to be cleared and saves a copy before freeing the stats contexts. During the next ifup, the driver will likely allocate the same hardware stats contexts and this will cause a big increase in the counters as the old counters are added back to the saved counters. We fix it by making an additional firmware call to clear the counters before freeing the hw stats contexts when the firmware is the older 20.x firmware. Fixes: b8875ca3 ("bnxt_en: Save ring statistics before reset.") Reported-by:
Jakub Kicinski <kicinski@fb.com> Reviewed-by:
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Michael Chan authored
Older firmware may not support legacy TX push properly and may not be disabling it. So we check certain firmware versions that may have this problem and disable legacy TX push unconditionally. Fixes: c0c050c5 ("bnxt_en: New Broadcom ethernet driver.") Reviewed-by:
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Michael Chan authored
We currently only store the firmware version as a string for ethtool and devlink info. Store it also as a version code. The next 2 patches will need to check the firmware major version to determine some workarounds. We also use the 16-bit firmware version fields if the firmware is newer and provides the 16-bit fields. Reviewed-by:
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- 15 Jun, 2020 4 commits
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Vasundhara Volam authored
This will avoid many uneccessary error logs when driver or firmware is in reset. Fixes: 230d1f0d ("bnxt_en: Handle firmware reset.") Signed-off-by:
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Michael Chan authored
AER reset should follow the same steps as suspend/resume. We need to free context memory during AER reset and allocate new context memory during recovery by calling bnxt_hwrm_func_qcaps(). We also need to call bnxt_reenable_sriov() to restore the VFs. Fixes: bae361c5 ("bnxt_en: Improve AER slot reset.") Signed-off-by:
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Michael Chan authored
If VFs are enabled, we need to re-configure them during resume because firmware has been reset while resuming. Otherwise, the VFs won't work after resume. Fixes: c16d4ee0 ("bnxt_en: Refactor logic to re-enable SRIOV after firmware reset detected.") Signed-off-by:
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Michael Chan authored
The separate steps we do in bnxt_resume() can be done more simply by calling bnxt_hwrm_func_qcaps(). This change will add an extra __bnxt_hwrm_func_qcaps() call which is needed anyway on older firmware. Fixes: f9b69d7f ("bnxt_en: Fix suspend/resume path on 57500 chips") Signed-off-by:
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- 27 May, 2020 2 commits
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Edwin Peer authored
The explicit mask and shift is not the appropriate way to parse fields out of a little endian struct. The length field is internally __le16 and the strategy employed only happens to work on little endian machines because the offset used is actually incorrect (length is at offset 6). Also remove the related and no longer used definitions from bnxt.h. Fixes: 845adfe4 ("bnxt_en: Improve valid bit checking in firmware response message.") Signed-off-by:
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Michael Chan authored
We have logic to maintain network counters across resets by storing the counters in bp->net_stats_prev before reset. But not all resets will clear the counters. Certain resets that don't need to change the number of rings do not clear the counters. The current logic accumulates the counters before all resets, causing big jumps in the counters after some resets, such as ethtool -G. Fix it by only accumulating the counters during reset if the irq_re_init parameter is set. The parameter signifies that all rings and interrupts will be reset and that means that the counters will also be reset. Reported-by:
Vijayendra Suman <vijayendra.suman@oracle.com> Fixes: b8875ca3 ("bnxt_en: Save ring statistics before reset.") Signed-off-by:
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- 04 May, 2020 6 commits
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Michael Chan authored
We currently have 3 software ring counters, rx_l4_csum_errors, rx_buf_errors, and missed_irqs. The 1st two are RX counters and the last one is a common counter. Organize them into 2 structures bnxt_rx_sw_stats and bnxt_cmn_sw_stats. Signed-off-by:
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Michael Chan authored
Read the L2 doorbell size from the firmware and only map the portion of the doorbell BAR for L2 use. This will leave the remaining doorbell BAR available for the RoCE driver to use. The RoCE driver can map the remaining portion as write-combining to support the push feature. Signed-off-by:
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Michael Chan authored
Define the 57500 chip doorbell offsets instead of using the magic values in the C file. Signed-off-by:
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Vasundhara Volam authored
The firmware does not expect the CRC to be included in the length passed from the driver. The firmware always configures the chip to strip out the CRC. Signed-off-by:
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Michael Chan authored
The current formulas to calculate the TQM slow path and fast path ring context memory sizes are not quite correct. TQM slow path entry is array index 0 of ctx->tqm_mem[]. The other array entries are for fast path. Fix these sizes according to latest firmware spec. for 57500 and newer chips. Fixes: 3be8136c ("bnxt_en: Initialize context memory to the value specified by firmware.") Signed-off-by:
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Michael Chan authored
Newer firmware spec. will specify the number of TQM rings to allocate context memory for. Use the firmware specified value and fall back to the old value derived from bp->max_q if it is not available. Signed-off-by:
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- 27 Apr, 2020 3 commits
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Michael Chan authored
The current logic in bnxt_fix_features() will inadvertently turn on both CTAG and STAG VLAN offload if the user tries to disable both. Fix it by checking that the user is trying to enable CTAG or STAG before enabling both. The logic is supposed to enable or disable both CTAG and STAG together. Fixes: 5a9f6b23 ("bnxt_en: Enable and disable RX CTAG and RX STAG VLAN acceleration together.") Signed-off-by:
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Michael Chan authored
bnxt_alloc_ctx_pg_tbls() should return error when the memory size of the context memory to set up is zero. By returning success (0), the caller may proceed normally and may crash later when it tries to set up the memory. Fixes: 08fe9d18 ("bnxt_en: Add Level 2 context memory paging support.") Signed-off-by:
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Michael Chan authored
Improve the slot reset sequence by disabling the device to prevent bad DMAs if slot reset fails. Return the proper result instead of always PCI_ERS_RESULT_RECOVERED to the caller. Fixes: 6316ea6d ("bnxt_en: Enable AER support.") Signed-off-by:
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- 27 Mar, 2020 1 commit
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Vasundhara Volam authored
Store the part number and serial number information from VPD in the bnxt structure. Follow up patch will add the support to display the information via devlink command. Signed-off-by:
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