- 28 May, 2020 24 commits
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Hua Zhang authored
When smu_i2c_eeprom_init is called on the smu resuming process under sroiv mode, there will be a call trace: [ 436.377690] dump_stack+0x63/0x85 [ 436.377695] kobject_init+0x77/0x90 [ 436.377704] device_initialize+0x28/0x110 [ 436.377708] device_register+0x12/0x20 [ 436.377756] i2c_register_adapter+0xeb/0x400 [ 436.377763] i2c_add_adapter+0x5a/0x80 [ 436.377951] arcturus_i2c_eeprom_control_init+0x60/0x80 [amdgpu] [ 436.378123] smu_resume+0xcc/0x110 [amdgpu] [ 436.378247] amdgpu_device_gpu_recover+0xfb1/0xfc0 [amdgpu] [ 436.378401] amdgpu_job_timedout+0xf2/0x150 [amdgpu] [ 436.378414] drm_sched_job_timedout+0x70/0xc0 [amd_sched] [ 436.378420] ? drm_sched_job_timedout+0x70/0xc0 [amd_sched] [ 436.378430] process_one_work+0x1fd/0x3f0 [ 436.378438] worker_thread+0x34/0x410 [ 436.378444] kthread+0x121/0x140 [ 436.378451] ? process_one_work+0x3f0/0x3f0 [ 436.378456] ? kthread_create_worker_on_cpu+0x70/0x70 [ 436.378464] ret_from_fork+0x35/0x40 This is because smu_i2c_eeprom is not released on gpu recovering. Actually, smu_i2c_eeprom_init/fini are only needed under bare mental mode. Signed-off-by: Hua Zhang <hua.zhang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Kevin Wang authored
by default, vega20 will use legacy powerplay driver. in order to maintain the code conveniently in the future, remove the support of vega20 from swsmu. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Kevin Wang authored
the vega20 asic uses legacy powerplay driver by default. 1. cleanup is_support_sw_smu_xgmi() function. (only use for vega20 xgmi pstate check) 2. by default, the vega20 set xgmi pstate by legacy powerplay routine. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Likun Gao authored
Change memory training init and finit a common function, as it only have software behavior do not relay on the IP version of PSP. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Anthony Koo authored
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Yongqiang Sun authored
[Why] dal side nv12 wa has a lot of side effects. KMD side wa is used, so this should be remove. [How] Removed wa from dal side. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Dmytro Laktyushkin authored
Set the correct value to immediate flip required field. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Samson Tam <Samson.Tam@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Dmytro Laktyushkin authored
This change removes internal rounding in dml_log2 function. Dml_log2 is expected to return a float output. In case an int is needed dml will floor the output on it's own. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Nicholas Kazlauskas authored
[Why] Region 4 is non cacheable and slower than using cache window 4. [How] Check the firmware version to determine how we should program the base address and memory windows. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Nicholas Kazlauskas authored
[Why] In order to switch over the inbox from region4 to cw4 we need to know if the firmware is capable of properly invalidating the cache before reading the commands. Easiest way is to just check the firmware version, but we don't have the helper macros or a way for the dmub_srv to know what version it is. [How] Add a new fw_version field to the creation parameters that driver can optional pass in. Assumes a version of 0x00000000 is invalid. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Jake Wang authored
[WHY] Currently we're copying the entire bios image into vbios. Loading time for FW with entire bios(54272 bytes) is 105138us. By copying only the sections of bios we're using(4436 bytes), loading time drops to 104326us which saves us 812us. [HOW] ROM header, master data table, and all data tables will be packed in contiguous manner. The offsets for the data tables are remapped to their newly packed location. Signed-off-by: Jake Wang <haonan.wang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Wenjing Liu authored
[why] DP link layer CTS specs updated to change the test parameters in test 4.2.1.1. Before it requires source to delay 400us on aux no reply. With the specs updates Errata5, it requires source to delay 3.2ms (based on LTTPR aux timeout) This causes our test to fail after updating with the latest test equipment firmware. [how] the change is to allow LTTPR 3.2ms aux timeout delay by default. And only set to 400us if LTTPR is not present. Before this piece of logic is interwined with LTTPR support. Now we will default to 3.2ms aux timeout even if LTTPR support is not enabled by driver. Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Dmytro Laktyushkin authored
Preparation for new asic support. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Aric Cyr authored
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Wyatt Wood authored
[Why] Due to packing of abm_config_table, memory addresses aren't aligned to 32 bit boundary dmcub prefers. Therefore when using pointers to this structure, it's possible that dmcub will automatically align the data read from that address, yielding incorrect values. [How] Instead of packing 1 byte boundary, explicitly pack values to 4 byte boundary. Since there is a dependency on the existing iram table structure on driver side, we must copy to a second structure, which is aligned correctly, before passing to fw. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Anthony Koo authored
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Yongqiang Sun authored
[Why & How] Implement abm set_pipe call stacks Have some asics speicifc call stacks for abm. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Rodrigo Siqueira authored
Christian Koenig pointed out a code duplication related to bit swap in case of big-endian manipulation. This commit adds a helper for handling this verification and reduces the requirement of replicate some part of the code. Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Reviewed-by: Wyatt Wood <Wyatt.Wood@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Nicholas Kazlauskas authored
[Why] If bss_data_size is 0 then we shouldn't be passing down fw_bss_data into the DMUB service since the region isn't really "valid." [How] Pass NULL instead if the size is 0. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Zhan Liu <Zhan.Liu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Nicholas Kazlauskas authored
[Why] New unified firmware binary with only inst const still passes down fw_bss_data != NULL and params->bss_data_size == 0 from DM. This leads it into the legacy path causing firmware state allocation to be too small. [How] Check bss_data_size as well. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Zhan Liu <Zhan.Liu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Sung Lee authored
[WHY] Failing validation when building scaling parameters causes corruption to occur due to pipe splitting with smaller pixel widths than HW supports. This needs to fail silently for now to hide the corruption until the corruption itself can be fixed. [HOW] Do not fail validation if building scaling params fails. Signed-off-by: Sung Lee <sung.lee@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Jaehyun Chung authored
[Why] Remove dm_write_persistent_data and dm_read_persistent_data as persistence should be handled in DM. [How] Remove functions. Move read/write calls into DM layer while maintaining logic. Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
amd-drm-next-5.8-2020-05-27: amdgpu: - SRIOV fixes - RAS fixes - VCN 2.5 DPG (Dynamic PowerGating) fixes - FP16 updates for display - CTF cleanups - Display fixes - Fix pcie bw sysfs handling - Enable resizeable BAR support for gmc 10.x - GFXOFF fixes for Raven - PM sysfs handling fixes amdkfd: - Fix a race condition - Warning fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200527231219.3930-1-alexander.deucher@amd.com
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Dave Airlie authored
Merge tag 'drm-misc-next-fixes-2020-05-27' of git://anongit.freedesktop.org/drm/drm-misc into drm-next Short summary of fixes pull (less than what git shortlog provides): There's a fix for panel brighness on Lenovo X13 Yoga devices and a fix for -Wformat warnings on architectures where atomic-64 counters are not of type unsigned long long. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20200527080123.GA8186@linux-uq9g
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- 27 May, 2020 2 commits
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Aric Cyr authored
[Why] If VUPDATE_END is before VUPDATE_START the delay calculated can become very large, causing a soft hang. [How] Take the absolute value of the difference between START and END. Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Simon Ser authored
get_cursor_position already handles the case where the cursor has negative off-screen coordinates by not setting dc_cursor_position.enabled. Signed-off-by: Simon Ser <contact@emersion.fr> Fixes: 626bf90f ("drm/amd/display: add basic atomic check for cursor plane") Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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- 26 May, 2020 2 commits
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Kevin Wang authored
the origin design will use varible of "attr->states" to save node supported states on current gpu device, but for multi gpu device, when probe second gpu device, the driver will check attribute node states from previous gpu device wthether to create attribute node. it will cause other gpu device create attribute node faild. 1. add member attr_list into amdgpu_device to link supported device attribute node. 2. add new structure "struct amdgpu_device_attr_entry{}" to track device attribute state. 3. drop member "states" from amdgpu_device_attr. v2: 1. move "attr_list" into amdgpu_pm and rename to "pm_attr_list". 2. refine create & remove device node functions parameter. fix: drm/amdgpu: optimize amdgpu device attribute code Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Dave Airlie authored
nouveau was calling the fbdev API which has issues with modules and built-ins. Call the correct API. Reported-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Fixes: 2dd4d163 ("drm/nouveau: remove open-coded version of remove_conflicting_pci_framebuffers()") Link: https://lore.kernel.org/lkml/21b52c28-3ace-cd13-d8ce-f38f2c6b2a96@infradead.org/T/#uSigned-off-by: Dave Airlie <airlied@redhat.com>
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- 22 May, 2020 12 commits
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Lyude Paul authored
On some architectures like ppc64le and aarch64, compiling with -Wformat=1 will throw the following warnings: In file included from drivers/gpu/drm/drm_vblank.c:33: drivers/gpu/drm/drm_vblank.c: In function 'drm_update_vblank_count': drivers/gpu/drm/drm_vblank.c:273:16: warning: format '%llu' expects argument of type 'long long unsigned int', but argument 4 has type 'long int' [-Wformat=] DRM_DEBUG_VBL("updating vblank count on crtc %u:" ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ./include/drm/drm_print.h:407:22: note: in definition of macro 'DRM_DEBUG_VBL' drm_dbg(DRM_UT_VBL, fmt, ##__VA_ARGS__) ^~~ drivers/gpu/drm/drm_vblank.c:274:22: note: format string is defined here " current=%llu, diff=%u, hw=%u hw_last=%u\n", ~~~^ %lu So, fix that with a typecast. Co-developed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20200521204647.2578479-1-lyude@redhat.com
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Felix Kuehling authored
This fixes an intermittent bug where a root PD clear operation still in progress could overwrite a PDE update done by the CPU, resulting in a VM fault. Fixes: 108b4d92 ("drm/amd/amdgpu: Update VM function pointer") Reported-by: Jay Cornwall <Jay.Cornwall@amd.com> Tested-by: Jay Cornwall <Jay.Cornwall@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Bhawanpreet Lakha authored
[Why] Previously we used the s3 codepath for gpu reset. This can lead to issues in certain case where we end of waiting for fences which will never come (because parts of the hw are off due to gpu reset) and we end up waiting forever causing a deadlock. [How] Handle GPU reset separately from normal s3 case. We essentially need to redo everything we do in s3, but avoid any drm calls. For GPU reset case suspend: -Acquire DC lock -Cache current dc_state -Commit 0 stream/planes to dc (this puts dc into a state where it can be powered off) -Disable interrupts resume -Edit cached state to force full update -Commit cached state from suspend -Build stream and plane updates from the cached state -Commit stream/plane updates -Enable interrupts -Release DC lock v2: -Formatting -Release dc_state Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Add some APU flags to simplify handling of different APU variants. It's easier to understand the special cases if we use names flags rather than checking device ids and silicon revisions. v2: rebase on latest code Acked-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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chen gong authored
[Problem description] 1. Boot up picasso platform, launches desktop, Don't do anything (APU enter into "gfxoff" state) 2. Remote login to platform using SSH, then type the command line: sudo su -c "echo manual > /sys/class/drm/card0/device/power_dpm_force_performance_level" sudo su -c "echo 2 > /sys/class/drm/card0/device/pp_dpm_sclk" (fix SCLK to 1400MHz) 3. Move the mouse around in Window 4. Phenomenon : The screen frozen Tester will switch sclk level during glmark2 run time. APU will enter "gfxoff" state intermittently during glmark2 run time. The system got hanged if fix GFXCLK to 1400MHz when APU is in "gfxoff" state. [Debug] 1. Fix SCLK to X MHz 1400: screen frozen, screen black, then OS will reboot. 1300: screen frozen. 1200: screen frozen, screen black. 1100: screen frozen, screen black, then OS will reboot. 1000: screen frozen, screen black. 900: screen frozen, screen black, then OS will reboot. 800: Situation Nomal, issue disappear. 700: Situation Nomal, issue disappear. 2. SBIOS setting: AMD CBS --> SMU Debug Options -->SMU Debug --> "GFX DLDO Psm Margin Control": 50 : Situation Nomal, issue disappear. 45 : Situation Nomal, issue disappear. 40 : Situation Nomal, issue disappear. 35 : Situation Nomal, issue disappear. 30 : screen black. 25 : screen frozen, then blurred screen. 20 : screen frozen. 15 : screen black. 10 : screen frozen. 5 : screen frozen, then blurred screen. 3. Disable GFXOFF feature Situation Nomal, issue disappear. [Why] Through a period of time debugging with Sys Eng team and SMU team, Sys Eng team said this is voltage/frequency marginal issue not a F/W or H/W bug. This experiment proves that default targetPsm [for f=1400MHz] is not sufficient when GFXOFF is enabled on Picasso. SMU team think it is an odd test conditions to force sclk="1400MHz" when GPU is in "gfxoff" state,then wake up the GFX. SCLK should be in the "lowest frequency" when gfxoff. [How] Disable gfxoff when setting manual mode. Enable gfxoff when setting other mode(exiting manual mode) again. By the way, from the user point of view, now that user switch to manual mode and force SCLK Frequency, he don't want SCLK be controlled by workload.It becomes meaningless to "switch to manual mode" if APU enter "gfxoff" due to lack of workload at this point. Tips: Same issue observed on Raven. Signed-off-by: chen gong <curry.gong@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Fix typos that prevented them from showing up. v2: switch other files in addition to pp_clk_voltage Fixes: 4e01847c ("drm/amdgpu: optimize amdgpu device attribute code") Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1150Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Evan Quan <evan.quan@amd.com>
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Alex Deucher authored
We need to get the silicon revision id before we parse the firmware in order to load the correct gpu info firmware for raven2 variants. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1103Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Move it into the fw_info function since it's logically part of the same functionality. Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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git://github.com/skeggsb/linuxDave Airlie authored
- HD audio fixes on recent systems - vGPU detection (fail probe if we're on one, for now) - Interlaced mode fixes (mostly avoidance on Turing, which doesn't support it) - SVM improvements/fixes - NVIDIA format modifier support - Misc other fixes. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Ben Skeggs <skeggsb@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/ <CACAvsv6DcRFMDVEftdL7LxNtxuSQQ=qnfqdHXO0K=BmJ8Q2-+g@mail.gmail.com
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Dave Airlie authored
Merge tag 'mediatek-drm-next-5.8' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next Mediatek DRM Next for Linux 5.8 This include dpi pin mode swap, config mipi_tx current and impedance, and some fixup. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Chun-Kuang Hu <chunkuang.hu@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200521014612.17175-1-chunkuang.hu@kernel.org
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Dinghao Liu authored
pm_runtime_get_sync() increments the runtime PM usage counter even the call returns an error code. Thus a pairing decrement is needed on the error handling path to keep the counter balanced. Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Dinghao Liu authored
pm_runtime_get_sync() increments the runtime PM usage counter even the call returns an error code. Thus a pairing decrement is needed on the error handling path to keep the counter balanced. Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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