- 06 Nov, 2019 22 commits
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changzhu authored
The GRBM register interface is now capable of bursting 1 cycle per register wr->wr, wr->rd much faster than previous muticycle per transaction done interface. This has caused a problem where status registers requiring HW to update have a 1 cycle delay, due to the register update having to go through GRBM. For cp ucode, it has realized dummy read in cp firmware.It covers the use of WAIT_REG_MEM operation 1 case only.So it needs to call gfx_v10_0_wait_reg_mem in gfx10. Besides it also needs to add warning to update firmware in case firmware is too old to have function to realize dummy read in cp firmware. For sdma ucode, it hasn't realized dummy read in sdma firmware. sdma is moved to gfxhub in gfx10. So it needs to add dummy read in driver between amdgpu_ring_emit_wreg and amdgpu_ring_emit_reg_wait for sdma_v5_0. Signed-off-by:
changzhu <Changfeng.Zhu@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Evan Quan authored
smu_enable_umd_pstate() will try to get the smu->mutex which was already hold by its parent API smu_force_performance_level() on the call path. Thus deadlock happens. Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Feifei Xu <Feifei.Xu@amd.com> Signed-off-by:
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Evan Quan authored
P-state switch should be performed after all devices from the hive get initialized. Signed-off-by:
Jonathan Kim <Jonathan.Kim@amd.com> Signed-off-by:
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Evan Quan authored
Added lock protection so that the p-state switch will be guarded to be sequential. Also update the hive pstate only all device from the hive are in the same state. Signed-off-by:
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Evan Quan authored
Otherwise, the feature enablement will be skipped due to wrong count. Fixes: beff74bc ("drm/amdgpu: fix a race in GPU reset with IB test (v2)") Signed-off-by:
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Kevin Wang authored
fix workload bit (WORKLOAD_PPLIB_COMPUTE_BIT) map error on vega20 and navi asic. fix commit: drm/amd/powerplay: add function get_workload_type_map for swsmu Signed-off-by:
Kevin Wang <kevin1.wang@amd.com> Reviewed-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
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Evan Quan authored
To fit the latest SMU firmware. Signed-off-by:
Le Ma <Le.Ma@amd.com> Reviewed-by:
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Hawking Zhang authored
Direct uploading save/restore list via mmio register writes breaks the security policy. Instead, the driver should pass s&r list to psp. For all the ASICs that use rlc v2_1 headers, the driver actually upload s&r list twice, in non-psp ucode front door loading phase and gfx pg initialization phase. The latter is not allowed. VG12 is the only exception where the driver still keeps legacy approach for S&R list uploading. In theory, this can be elimnated if we have valid srcntl ucode for VG12. Signed-off-by:
Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by:
Candice Li <Candice.Li@amd.com> Signed-off-by:
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Andrey Grodzovsky authored
Fix a static code checker warning. v2: Drop PTR_ERR_OR_ZERO. Signed-off-by:
Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by:
Emily Deng <Emily.Deng@amd.com> Reviewed-by:
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Emily Deng authored
When unloading driver, need to free discovery memory. Signed-off-by:
Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by:
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Xiaojie Yuan authored
So we know where the tables came from. Signed-off-by:
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Zhan Liu authored
This reverts commit 967a3b85. Reason for revert: Root cause of this issue is found. The workaround is not needed anymore. Signed-off-by:
Zhan Liu <zhan.liu@amd.com> Reviewed-by:
Hersen Wu <hersenxs.wu@amd.com> Signed-off-by:
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Zhan Liu authored
[Why] Navi10 has 6 PHY, but Navi14 only has 5 PHY, that is because there is no ENGINE_ID_DIGD in Navi14. Without this patch, many HDMI related issues (e.g. HDMI S3 resume failure, HDMI pink screen on boot) will be observed. [How] If "eng_id" is larger than ENGINE_ID_DIGD, then add "eng_id" by 1. Signed-off-by:
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Neil Mayhew authored
Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
Neil Mayhew <neil@neil.mayhew.name> Signed-off-by:
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Alex Deucher authored
To better clarify what is happening in this function. Reviewed-by:
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Alex Deucher authored
It's safe to enable dynamic VCN powergating on raven and raven2 for increased power savings. Reviewed-by:
James Zhu <James.Zhu@amd.com> Signed-off-by:
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Tianci.Yin authored
Add the navi14 PCI device id. Reviewed-by:
Tianci.Yin <tianci.yin@amd.com> Signed-off-by:
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Evan Quan authored
Add xgmi pstate setting on powerplay routine. V2: split the change of is_support_sw_smu_xgmi into a separate patch Signed-off-by:
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Evan Quan authored
Add check for is_sw_smu routine and drop check for amdgpu_dpm which seems non-sense. Signed-off-by:
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Evan Quan authored
Pstate settings should be performed after all device of the XGMI setup get initialized. Signed-off-by:
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Shirish S authored
[Why] doing kthread_park()/unpark() from drm_sched_entity_fini while GPU reset is in progress defeats all the purpose of drm_sched_stop->kthread_park. If drm_sched_entity_fini->kthread_unpark() happens AFTER drm_sched_stop->kthread_park nothing prevents from another (third) thread to keep submitting job to HW which will be picked up by the unparked scheduler thread and try to submit to HW but fail because the HW ring is deactivated. [How] grab the reset lock before calling drm_sched_entity_fini() Signed-off-by:
Shirish S <shirish.s@amd.com> Suggested-by:
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Alex Deucher authored
These were not aligned for optimal performance for GPUVM. Reviewed-by:
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- 05 Nov, 2019 2 commits
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Daniel Vetter authored
It's broken. Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> References: https://lists.freedesktop.org/archives/dri-devel/2019-November/242625.htmlSigned-off-by:
Daniel Vetter <daniel.vetter@intel.com> Signed-off-by:
Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191105193829.11599-1-daniel.vetter@ffwll.ch
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Chenwandun authored
drivers/gpu/drm/drm_dp_mst_topology.c: In function __topology_ref_save: drivers/gpu/drm/drm_dp_mst_topology.c:1424:6: error: implicit declaration of function stack_trace_save; did you mean stack_depot_save? [-Werror=implicit-function-declaration] n = stack_trace_save(stack_entries, ARRAY_SIZE(stack_entries), 1); ^~~~~~~~~~~~~~~~ stack_depot_save drivers/gpu/drm/drm_dp_mst_topology.c: In function __dump_topology_ref_history: drivers/gpu/drm/drm_dp_mst_topology.c:1513:3: error: implicit declaration of function stack_trace_snprint; did you mean acpi_trace_point? [-Werror=implicit-function-declaration] stack_trace_snprint(buf, PAGE_SIZE, entries, nr_entries, 4); ^~~~~~~~~~~~~~~~~~~ acpi_trace_point stack_trace_save and stack_trace_snprint are declared in <linux/stacktrace.h>, so there is need to include it, and <linux/stackdepot.h> is already included by practices, so just replace <linux/stackdepot.h> by <linux/stacktrace.h>. Signed-off-by:Chenwandun <chenwandun@huawei.com> Reviewed-by:
Lyude Paul <lyude@redhat.com> Acked-by:
Daniel Vetter <daniel@ffwll.ch> Signed-off-by:
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- 04 Nov, 2019 1 commit
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
drm-next-5.5-2019-11-01: amdgpu: - Add EEPROM support for Arcturus - Enable VCN encode support for Arcturus - Misc PSP fixes - Misc DC fixes - swSMU cleanup amdkfd: - Misc cleanups - Fix typo in cu bitmap parsing Signed-off-by:
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- 03 Nov, 2019 3 commits
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Dave Airlie authored
Merge tag 'drm-intel-next-2019-11-01-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-next UAPI Changes: - Make context persistence optional Allow userspace to tie the context lifetime to FD lifetime, effectively allowing Ctrl-C killing of a process to also clean up the hardware immediately. Compute changes: https://github.com/intel/compute-runtime/pull/228 The compute driver is shipping in Ubuntu. uAPI acked by Mesa folks. - Put future HW and their uAPIs under STAGING & BROKEN Introduces DRM_I915_UNSTABLE Kconfig menu for working on the new uAPI for future HW in upstream. We already disable driver loading by default the platform is deemed ready. This is a second level of protection based on compile time switch (STAGING & BROKEN). - Under DRM_I915_UNSTABLE: Add the fake lmem region on iGFX Fake local memory region on integrated GPU through cmdline: memmap=2G$16G i915.fake_lmem_start=0x400000000 Currently allows testing non-mappable GGTT behavior and running kernel selftest for local memory. Driver Changes: - Fix Bugzilla #112084: VGA external monitor not working (Ville) - Add support for half float framebuffers (Ville) - Add perf support on TGL (Lionel) - Replace hangcheck by heartbeats (Chris) - Allow SPT PCH on all AML devices (James) - Add new CNL PCH for CML platform (Imre) - Allow 100 ms (Kconfig) for workloads to exit before reset (Chris, Jon, Joonas) - Forcibly pre-empt a context after 100 ms (Kconfig) of delay (Chris) - Make timeslice duration Kconfig configurable (Chris) - Whitelist PS_(DEPTH|INVOCATION)_COUNT for Tigerlake (Tapani) - Support creating LMEM objects in kernel (Matt A) - Adjust the location of RING_MI_MODE in the context image for TGL (Chris) - Handle AUX interrupts for TC ports (Matt R) - Add support for devices without mappable GGTT aperture (Daniele) - Rename "inject_load_failure" module parameter to "inject_probe_failure" (Janusz) - Handle fused off HDCP, FBC, DMC and DSC (Jose) - Add support to one DP-MST stream on Tigerlake (Lucas) - Add HuC firmware (and GuC) for TGL (Daniele) - Allow ICL+ DSI on any pipe (Ville) - Check some transcoder timing minimum limits (Ville) - Don't set queue_priority_hint if we don't kick the submission (Chris) - Introduce barrier pulses along engines to flush idle/in-flight requests (Chris) - Drop assertion that ce->pin_mutex guards state updates (Chris) - Cancel banned contexts on schedule-out (Chris) - Cancel contexts when hangchecking is disabled (Chris) - Catch GTT fault errors for gen11+ planes (Matt R) - Print in debugfs if PSR is not enabled because of sink (Jose) - Do not set MOCS control values on dgfx (Lucas) - Setup io-mapping for LMEM (Abdiel) - Support kernel mapping of LMEM objects (Abdiel) - Add LMEM selftests (Matt A) - Initialise PMU spinlock before registering (Chris) - Clear DKL_TX_PMD_LANE_SUS before program TC voltage swing (Jose) - Flip interpretation of ips fmin/fmax to max rps (Chris) - Add VBT compression parameter block definition (Jani) - Limit the blitter sizes to ensure low preemption latency (Chris) - Fixup block_size rounding on BLT (Matt A) - Don't try to place HWS in non-existing mappable region (Michal Wa) - Don't allocate the ring in stolen if we lack aperture (Matt A) - Add AUX B & C to DC_OFF_POWER_DOMAINS for Tigerlake (Matt R) - Avoid HPD poll detect triggering a new detect cycle (Imre) - Document the userspace fail with possible_crtcs (Ville) - Drop lrc header page now unused by GuC (Daniele) - Do not switch aux to TBT mode for non-TC ports (Jose) - Restructure code to avoid depending on i915 but smaller structs (Chris, Tvrtko, Andi) - Remove pm park/unpark notifications (Chris) - Avoid lockdep cross-contamination between object types (Chris) - Restructure DSC code (Jani) - Fix dead locking in early workload shadow (Zhenyu) - Split the legacy submission backend from the common CS ring buffer (Chris) - Move intel_engine_context_in/out into intel_lrc.c (Tvrtko) - Describe perf/wakeref structure members in documentation (Anna) - Update renamed header files names in documentation (Anna) - Add debugs to distingiush a cd2x update from a full cdclk pll update (Ville) - Rework atomic global state locking (Ville) - Allow planes to declare their minimum acceptable cdclk (Ville) - Eliminate skl_check_pipe_max_pixel_rate() and simplify skl_max_scale() (Ville) - Making loglevel of PSR2/SU logs same (Ap) - Capture aux page table error register (Lionel) - Add is_dgfx to device info (Jose) - Split gen11_irq_handler to make it shareable (Lucas) - Encapsulate kconfig constant values inside boolean predicates (Chris) - Split memory_region initialisation into its own file (Chris) - Use _PICK() for CHICKEN_TRANS() and add CHICKEN_TRANS_D (Ville) - Add perf helper macros for comparing with whitelisted registers (Umesh) - Fix i915_inject_load_error() name to read *_probe_* (Janusz) - Drop unused AUX register offsets (Matt R) - Provide more information on DP AUX failures (Matt R) - Add GAM/SFC instdone to error state (Mika) - Always track callers to intel_rps_mark_interactive() (Chris) - Nuke 'mode' argument to intel_get_load_detect_pipe() (Ville) - Simplify LVDS crtc_mask and pipe_mask setup (Ville) - Stop frobbing crtc->base.mode (Ville) - Do s/crtc_mask/pipe_mask/ (Ville) - Split detaching and removing the vma (Chris) - Selftest improvements (Chris, Tvrtko, Mika, Matt A, Lionel) - GuC code improvements (Rob, Andi, Daniele) - Check against i915_selftest only under CONFIG_SELFTEST (Chris) - Refine occupancy test in kill_context() (Chris) - Start kthreads before stopping (Chris) Signed-off-by:
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git://anongit.freedesktop.org/tegra/linuxDave Airlie authored
drm/tegra: Changes for v5.5-rc1 The bulk of these changes is the addition of DisplayPort support for Tegra210, Tegra186 and Tegra194. I've been running versions of this for about three years now, so I'd consider these changes to be pretty mature. These changes also unify the existing eDP support with the DP support since the programming is very similar, except for a few steps that can be easily parameterized. The rest are a couple of fixes all over the place for minor issues, as well as some work to support the IOMMU-backed DMA API, which in the end turned out to also clean up a number of cases where the DMA API was not being used correctly. Signed-off-by:
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git://anongit.freedesktop.org/drm/drm-miscDave Airlie authored
drm-misc-next for 5.5: UAPI Changes: -dma-buf: Introduce and revert dma-buf heap (Andrew/John/Sean) Cross-subsystem Changes: - None Core Changes: -dma-buf: add dynamic mapping to allow exporters to choose dma_resv lock state on mmap/munmap (Christian) -vram: add prepare/cleanup fb helpers to vram helpers (Thomas) -ttm: always keep bo's on the lru + ttm cleanups (Christian) -sched: allow a free_job routine to sleep (Steven) -fb_helper: remove unused drm_fb_helper_defio_init() (Thomas) Driver Changes: -bochs/hibmc/vboxvideo: Use new vram helpers for prepare/cleanup fb (Thomas) -amdgpu: Implement dma-buf import/export without drm helpers (Christian) -panfrost: Simplify devfreq integration in driver (Steven) Cc: Christian König <christian.koenig@amd.com> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: Steven Price <steven.price@arm.com> Cc: Andrew F. Davis <afd@ti.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Sean Paul <seanpaul@chromium.org> Signed-off-by:
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- 01 Nov, 2019 7 commits
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Joonas Lahtinen authored
Signed-off-by:Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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Chris Wilson authored
An interesting observation made with our parallel selftests was that on our small/single cpu systems we would call kthread_stop() before the kthreads were spawned. If this happens, the kthread is never run at all; completely bypassing the test. A simple yield() from the parent will ensure that all children have the opportunity to start before we reap them. Signed-off-by:
Chris Wilson <chris@chris-wilson.co.uk> Cc: Matthew Auld <matthew.auld@intel.com> Reviewed-by:
Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191101084940.31838-1-chris@chris-wilson.co.uk
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Chris Wilson authored
The i915_selftest module parameters only exist when CONFIG_DRM_I915_SELFTEST is set. Signed-off-by:
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Thierry Reding authored
Currently configurations can be generated where IOMMU_SUPPORT is disabled but IOMMU_IOVA is built as a module and DRM_TEGRA as built-in. In such a case, the symbols guarded by IOMMU_IOVA will not be available when linking the Tegra DRM driver and cause a linking failure. Simplify this by unconditionally selecting IOMMU_IOVA, which makes sure that it will be forced to =y if DRM_TEGRA=y. Technically we can now get IOMMU_IOVA code built-in even if we don't use it (Tegra DRM only uses it when IOMMU_SUPPORT is also enabled), but such configuration are of a mostly academic nature. In all practical configurations we want IOMMU support anyway. Signed-off-by:Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Currently configurations can be generated where IOMMU_SUPPORT is disabled but IOMMU_IOVA is built as a module and HOST1X as built-in. In such a case, the symbols guarded by IOMMU_IOVA will not be available when linking the host1x driver and cause a linking failure. Simplify this by unconditionally selecting IOMMU_IOVA, which makes sure that it will be forced to =y if HOST1X=y. Technically we can now get IOMMU_IOVA code built-in even if we don't use it (host1x only uses it when IOMMU_SUPPORT is also enabled), but such configuration are of a mostly academic nature. In all practical configurations we want IOMMU support anyway. Signed-off-by: -
Chris Wilson authored
Don't just look at the very last request in a queue when deciding if we need to evict the context from the GPU, as that request may still be in the submission queue while the rest of the context is running! Instead, walk back along the queued requests looking for the active request and checking that. Fixes: 2e0986a5 ("drm/i915/gem: Cancel contexts when hangchecking is disabled") Testcase: igt/gem_ctx_persistence/queued Signed-off-by:
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Joonas Lahtinen authored
Signed-off-by:
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- 31 Oct, 2019 5 commits
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Matthew Auld authored
Intended for upstream testing so that we can still exercise the LMEM plumbing and !i915_ggtt_has_aperture paths. Smoke tested on Skull Canyon device. This works by allocating an intel_memory_region for a reserved portion of system memory, which we treat like LMEM. For the LMEMBAR we steal the aperture and 1:1 it map to the stolen region. To enable simply set the i915 modparam fake_lmem_start= on the kernel cmdline with the start of reserved region(see memmap=). The size of the region we can use is determined by the size of the mappable aperture, so the size of reserved region should be >= mappable_end. For now we only enable for the selftests. Depends on CONFIG_DRM_I915_UNSTABLE being enabled. eg. memmap=2G$16G i915.fake_lmem_start=0x400000000 v2: make fake_lmem_start an i915 modparam Signed-off-by:
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José Roberto de Souza authored
Non-TC ports always have tc_mode == TC_PORT_TBT_ALT so it was switching aux to TBT mode for all combo-phy ports, happily this did not caused any issue but is better follow BSpec. Also this is reserved bit before ICL. Cc: Imre Deak <imre.deak@intel.com> Signed-off-by:
José Roberto de Souza <jose.souza@intel.com> Fixes: e9b7e142 ("drm/i915: Sanitize the terminology used for TypeC port modes") Reviewed-by:
Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191029011014.286885-1-jose.souza@intel.com
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Daniele Ceraolo Spurio authored
Recent GuC doesn't require the shared area. We still have one user in i915 (engine reset via guc) because we haven't updated the command to match the current guc submission flow [1]. Since the flow in guc is about to change again, just disable the command for now and add a note that we'll implement it as part of the new flow. [1] https://patchwork.freedesktop.org/patch/295038/Signed-off-by:
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Cc: Fernando Pacheco <fernando.pacheco@intel.com> Acked-by:
Matthew Brost <matthew.brost@intel.com> Signed-off-by:
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Daniele Ceraolo Spurio authored
Recent GuC binaries (including all the ones we're currently using) don't require this shared area anymore, having moved the relevant entries into the stage pool instead. i915 itself doesn't write anything into it either, so we can safely drop it. Signed-off-by:
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Chris Wilson authored
In order to keep the assert_bind_count() valid, we need to hold the vma page reference until after we drop the bind count. However, we must also keep the drm_mm_remove_node() as the last action of i915_vma_unbind() so that it serialises with the unlocked check inside i915_vma_destroy(). So we need to split up i915_vma_remove() so that we order the detach, drop pages and remove as required during unbind. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112067Signed-off-by:
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