Link handling changes (Andy Lutomirski <luto@myrealbox.com>):
- removed rtl8169_hw_phy_reset() and its busy loop;
- RTL8169_PHY_TIMEOUT is x10 to account for the removal of the
  phy_link_down_cnt loop in rtl8169_phy_timer();
- added spinlocking in timer context for rtl8169_phy_timer to avoid
  messing with the {set/get}_settings commands issued via ethtool;
- more TBI stuff.

This patch differs from the former version on the following points:
- the LinkChg irq does not enable the phy timer when the link goes
  down any more;
- the phy timer is not enabled in rtl8169_set_speed();
- removal of the initial renegotiation hack.

- ethtool get_settings() for r8169 (Andy Lutomirski <luto@myrealbox.com>);
- rtl8169_ethtool_ops.get_drvinfo() is set as well;
- added some bits to handle the TBI status.

The locking does not need to be specially clever.

ethtool set_settings support (Andy Lutomirski <luto@myrealbox.com>).
The initial code has been modified so that the settings of parameters
for TBI and normal mode do not step on each others shoes.

Spring cleanup
- unsigned int (u32) should be slightly faster on ppc64 (Jon D Mason);
- misc minor de-uglyfication.

RxUnderrun status bit renamed to LinkChg (identical to the 8139cp driver).

Napi for r8169 (Jon D Mason <jonmason@us.ibm.com>).
Both Tx and Rx processing are moved to the ->poll() function.

into ppc970.osdl.org:/home/torvalds/v2.6/linux

ata_scsi_translate() sets this flag for all ATA->SCSI translated
commands, so it need not be done in atapi_xlat().  The now-removed
use in atapi_xlat() was also inconsistent WRT PIO versus DMA.

DMADIR bit is necessary for some PATA->SATA bridges.  These
bridges require the OS driver to specify the data xfer direction,
for PACKET (a.k.a. scsi) commands.

A reliable DMADIR detection method hasn't yet been developed,
and ATAPI is still a WIP, so DMADIR is enabled with an ifdef for
now.

into ppc970.osdl.org:/home/torvalds/v2.6/linux

Since all boards specify base_baud, the code to default base_baud to
the architecture-defined BASE_BAUD is redundant.  Also, defaulting
to the architecture-defined BASE_BAUD is wrong since the UARTs on a
serial PCI card will be clocked at the same rate no matter what the
architecture of the host machine.

into ppc970.osdl.org:/home/torvalds/v2.6/linux

This eliminates the last SWI user from the kernel - now all SWI calls
will only come from userspace.  More importantly, this also allows us
to empty the kernel stack when starting userspace programs from
kernelspace, thereby ensuring that the user registers always appear
at the top of the kernel stack.

This moves a bunch of EXPORT_SYMBOL() statements from armksyms.c
into the file which defines the function/variable such that the
exports are localised.

This also means we can get rid of the ugly __xxx_to_xxx__is_a_macro
in include/asm-arm/arch-*/memory.h

into ppc970.osdl.org:/home/torvalds/v2.6/linux

into redhat.com:/spare/repo/net-drivers-2.6

No more users of the autoirq_xxx() API existed, so this file is not
only unused, it isn't even listed in any makefiles.

This fixes the gfp_mask setting on the quota inode.

into redhat.com:/spare/repo/net-drivers-2.6

This patch makes the b44-after-bcm4400 scenario work for
me. What was happening is that the broadcom driver sets a "power off MAC"
bit, and we didn't remove that when initializing the chip.
Also added some (a bit ugly, I know  ) logic to clear up the address
filter stuff, which is what recent broadcom drivers do...

It's easier to do it this way, than polling, at the moment.

Also, fix a test in ata_scsi_translate that was incorrectly
erroring-out non-data commands.

* now that ATAPI is close to working, making ATAPI DMA interrupts
  in ata_host_intr
* remove unnecessary space character in printk() output (oh, the horror)

From: Ivan Kokshaysky <ink@jurassic.park.msu.ru>

This skips the GP-loading function prologue (two instructions: 8 bytes)
on BRSGP linkage correctly, fixing an oops on alpha while loading the
aic7xxx driver.

mapped memory.

A regular "memset()" may be using cache control
instructions etc, which is not appropriate for
memory-mapped IO.

This also fixes a warning.

into ppc970.osdl.org:/home/torvalds/v2.6/linux

Patch from Robin Farine

Fix the xscale cache handling routines that were invalidating a D 
cache line instead of draining the write & fill buffer as intended.

Patch from Catalin Marinas

Unlike the v5 architecture, the ARM1136 requires that BIT4 is 0 in
the first level page descriptor (ARM1136 TRM, page 6-39). It works
at the moment but it might break future v6 cores.

Patch from Catalin Marinas

The v6_dma_invalidate_range - the "mcr" instruction for draining

the write buffer requires r0 == 0. A "cmp" instruction for

testing the end address is missing in the v6_dma_flush_range

function.

Patch from Catalin Marinas

The _raw_write_(try)lock functions in include/asm-arm/spinlock.h

should use the early clobber modifier (&) for the "tmp" register.

A newer compiler (gcc-3.4.0) generates an "strexeq %0, %1, [%2]"

instruction where %0 is the same as %2, which is illegal.

Patch from Catalin Marinas

In the blockops_check() function, cache_type is uninitialised

because an "mcr" instruction is used instead of "mrc".

into ppc970.osdl.org:/home/torvalds/v2.6/linux

into ppc970.osdl.org:/home/torvalds/v2.6/linux

This fixes the problem with recursion into filesystem when inode of
quota file needs a page + some other allocation problems.  I hope I got
the GFP mask setting right..

into ppc970.osdl.org:/home/torvalds/v2.6/linux

Remove unused 'done_late' arg to ata_qc_complete(), which was never
useful in 2.4, and never used at all in 2.6.

This allows us to eliminate the same arg from ata_dma_complete(),
and also make it more correct by passing the command rather than
the ATA port structure as arg0.

into redhat.com:/spare/repo/libata-2.6

We need to always allocate at least one indirect block
pointer, since we always fill out blocks[0] even if
we don't have any groups.

Trivia.

CMD640 driver doesn't use generic IDE PCI code (it doesn't even include
this header).

- many Maxtor disks incorrectly claim CACHE FLUSH EXT command support,
  fix it by checking both CACHE FLUSH EXT command and LBA48 support
  (thanks to Eric D. Mudama for help in fixing this)

- write_cache() was called with 'drive->id->cfs_enable_2 & 0x3000' as 'int arg'
  argument which was always truncated to zero due to 'u8 drive->wcache = arg'
  assignment so write cache was indeed enabled but drive->wcache was zero
  (thanks to Rene Herman for help in debugging this)

- flush cache in idedisk_start_power_step() only if ATA-6 CACHE FLUSH (EXT)
  bits are present in disk's identify data (prevents sending unknown commands)

- set drive->wcache in idedisk_setup() not idedisk_attach() (no need to check
  id->command_set_2 - we check id->cfs_enable_2 instead in write_cache() call)

- use ide_cacheflush_p() in idedisk_setup()

- minor cleanups

This code is shared between i386 and x86-64, and x86-64 needs to check
for empty nodes here.  Otherwise you can get oopses at boot in some
circumstances. 

This handles empty nodes != 0; empty node zero are still broken in other
ways.