1. 23 Feb, 2014 1 commit
  2. 04 Feb, 2014 1 commit
    • Geert Uytterhoeven's avatar
      spi: rspi: Only enable interrupts when there's a need to wait · 5dd1ad23
      Geert Uytterhoeven authored
      rspi_wait_for_interrupt() unconditionally enables interrupts, even when the
      wait condition is already satisfied. This causes a high interrupt load (2
      interrupts/byte for full-duplex Single SPI transfers, 1 interrupt/byte for
      RSPI with TX Only mode, or QSPI in unidirectional Dual or Quad Transfer
      mode).
      
      Change this to return immediately when the wait condition is satisfied.
      This dramatically reduces the interrupt load, especially in high-speed
      Quad Transfer mode, and increases transfer speed, as no interrupts need to
      be handled when there's space available in the output FIFO, or data
      available in the input FIFO.
      
      Benchmark results for QSPI on r8a7791 while reading 1 MiB from 30 MHz SPI
      FLASH on the Koelsch development board:
      
      Before:
                              Single SPI      Dual SPI        Quad SPI
          Interrupts:         2096856         1048592         1048594
          Mbps:               0.9             1.6             1.6
      
      After:
      
                              Single SPI      Dual SPI        Quad SPI
          Interrupts:         1048569         21295           8
          Mbps:               0.7             10.8            12.9
      
      I don't know why Single SPI slowed down a bit.
      
      I've also verified functionality for RSPI-RZ on r7s72100, but don't have
      benchmark results as there's no SPI FLASH connected to RSPI on the Genmai
      development board. Unlike RSPI and QSPI, RSPI-RZ has separate interrupts
      for RX and TX, which shows that Single SPI transfers now generate (mostly)
      RX interrupts, as expected.
      Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@linux-m68k.org>
      Signed-off-by: default avatarMark Brown <broonie@linaro.org>
      5dd1ad23
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