1. 29 Apr, 2019 11 commits
  2. 28 Apr, 2019 1 commit
  3. 18 Apr, 2019 6 commits
  4. 17 Apr, 2019 4 commits
    • Volodymyr Babchuk's avatar
      optee: allow to work without static shared memory · 9733b072
      Volodymyr Babchuk authored
      On virtualized systems it is possible that OP-TEE will provide
      only dynamic shared memory support. So it is fine to boot
      without static SHM enabled if dymanic one is supported.
      Signed-off-by: default avatarVolodymyr Babchuk <vlad.babchuk@gmail.com>
      Signed-off-by: default avatarJens Wiklander <jens.wiklander@linaro.org>
      9733b072
    • Jon Hunter's avatar
      soc/tegra: pmc: Move powergate initialisation to probe · 6ac2a01d
      Jon Hunter authored
      Commit 8df12745 ("soc/tegra: pmc: Enable XUSB partitions on boot")
      was added as a workaround to ensure that the XUSB powergates or domains
      were turned on early during boot because as this time the Tegra XHCI
      driver did not handle the power domains at all. Now that the Tegra XHCI
      driver has been updated to properly managed the power domains, the
      workaround to enable the XUSB power domain early has been removed. This
      also means that we can now move the initialisation of the powergates
      into the PMC driver probe. Therefore, move the powergate initialisation
      into the PMC driver probe and return any errors detected. To handle any
      errors, functions to cleanup and remove any power-domains registered
      with the generic power-domain framework have been added.
      
      Finally the initialisation of the 'powergates_available' bitmask is kept
      in the PMC early init function to allow the legacy PMC powergate APIs to
      be called during early boot for enabling secondary CPUs on 32-bit Tegra
      devices.
      Signed-off-by: default avatarJon Hunter <jonathanh@nvidia.com>
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      6ac2a01d
    • Jon Hunter's avatar
      soc/tegra: pmc: Remove reset sysfs entries on error · a46b51cd
      Jon Hunter authored
      Commit 5f84bb1a ("soc/tegra: pmc: Add sysfs entries for reset info")
      added sysfs entries for Tegra reset source and level. However, these
      sysfs are not removed on error and so if the registering of PMC device
      is probe deferred, then the next time we attempt to probe the PMC device
      warnings such as the following will be displayed on boot ...
      
        sysfs: cannot create duplicate filename '/devices/platform/7000e400.pmc/reset_reason'
      
      Fix this by calling device_remove_file() for each sysfs entry added on
      failure. Note that we call device_remove_file() unconditionally without
      checking if the sysfs entry was created in the first place, but this
      should be OK because kernfs_remove_by_name_ns() will fail silently.
      
      Fixes: 5f84bb1a ("soc/tegra: pmc: Add sysfs entries for reset info")
      Signed-off-by: default avatarJon Hunter <jonathanh@nvidia.com>
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      a46b51cd
    • Jon Hunter's avatar
      soc/tegra: pmc: Fix reset sources and levels · 00cdaa1b
      Jon Hunter authored
      Commit 5f84bb1a ("soc/tegra: pmc: Add sysfs entries for reset info")
      added support for reading the Tegra reset source and level from sysfs.
      However, there are a few issues with this commit which are ...
      1. The number of reset sources for Tegra210 is defined as 5 but it
         should be 6.
      2. The number of reset sources for Tegra186 is defined as 13 but it
         should be 15.
      3. The SoC data variables num_reset_sources and num_reset_levels are
         defined but never used.
      
      Fix the above by ...
      
      1. Removing the reset source 'AOTAG' from the tegra30_reset_sources
         because this is only applicable for Tegra210.
      2. Adding a new tegra210_reset_sources structure for Tegra210 reset
         sources.
      3. Correct the number of reset sources for Tegra210 and Tegra186 by
         using the ARRAY_SIZE macro.
      4. Updating the functions reset_reason_show() and reset_level_show()
         to check whether the value read is valid. While we are at it
         clean-up these functions to remove an unnecessary u32 variable.
      
      Fixes: 5f84bb1a ("soc/tegra: pmc: Add sysfs entries for reset info")
      Signed-off-by: default avatarJon Hunter <jonathanh@nvidia.com>
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      00cdaa1b
  5. 16 Apr, 2019 2 commits
  6. 15 Apr, 2019 3 commits
  7. 12 Apr, 2019 2 commits
  8. 11 Apr, 2019 2 commits
  9. 10 Apr, 2019 1 commit
  10. 09 Apr, 2019 2 commits
  11. 08 Apr, 2019 4 commits
    • Keerthy's avatar
      soc: ti: pm33xx: AM437X: Add rtc_only with ddr in self-refresh support · 5a99ae00
      Keerthy authored
      During RTC-only suspend, power is lost to the wkup domain, so we need to
      save and restore the state of that domain. We also need to store some
      information within the RTC registers so that u-boot can do the right thing
      at powerup.
      
      The state is entered by getting the RTC to bring the pmic_power_en line low
      which will instruct the PMIC to disable the appropriate power rails after
      putting DDR into self-refresh mode. To bring pmic_power_en low, we need to
      get an ALARM2 event. Since we are running from SRAM at that point, it means
      calculating what the next second is (via ASM) and programming that into the
      RTC. This patch also adds support for wake up source detection.
      Signed-off-by: default avatarKeerthy <j-keerthy@ti.com>
      Signed-off-by: default avatarDave Gerlach <d-gerlach@ti.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      5a99ae00
    • Keerthy's avatar
      soc: ti: pm33xx: Move the am33xx_push_sram_idle to the top · 1c6c0354
      Keerthy authored
      Move the am33xx_push_sram_idle function to the top as a preparation
      for rtc+ddr mode as the function will be called by multiple functions
      currently present before it.
      
      No functional changes.
      Signed-off-by: default avatarKeerthy <j-keerthy@ti.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      1c6c0354
    • Keerthy's avatar
      ARM: OMAP2+: pm33xx: Add support for rtc+ddr in self refresh mode · 44c22a2d
      Keerthy authored
      Add support for rtc+ddr in self refresh mode. Add addtional
      pm hooks for save/restore and rtc suspend/resume.
      Signed-off-by: default avatarKeerthy <j-keerthy@ti.com>
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      44c22a2d
    • Keerthy's avatar
      rtc: OMAP: Add support for rtc-only mode · 6256f7f7
      Keerthy authored
      Prepare rtc driver for rtc-only with DDR in self-refresh mode.
      omap_rtc_power_off now should cater to two features:
      
      1) RTC plus DDR in self-refresh is power a saving mode where in the
      entire system including the different voltage rails from PMIC are
      shutdown except the ones feeding on to RTC and DDR. DDR is kept in
      self-refresh hence the contents are preserved. RTC ALARM2 is connected
      to PMIC_EN line once we the ALARM2 is triggered we enter the mode with
      DDR in self-refresh and RTC Ticking. After a predetermined time an RTC
      ALARM1 triggers waking up the system[1]. The control goes to bootloader.
      The bootloader then checks RTC scratchpad registers to confirm it was an
      rtc_only wakeup and follows a different path, configure bare minimal
      clocks for ddr and then jumps to the resume address in another RTC
      scratchpad registers and transfers the control to Kernel. Kernel then
      restores the saved context. omap_rtc_power_off_program does the ALARM2
      programming part.
      
           [1] http://www.ti.com/lit/ug/spruhl7h/spruhl7h.pdf Page 2884
      
      2) Power-off: This is usual poweroff mode. omap_rtc_power_off calls the
      above omap_rtc_power_off_program function and in addition to that
      programs the OMAP_RTC_PMIC_REG for any external wake ups for PMIC like
      the pushbutton and shuts off the PMIC.
      
      Hence the split in omap_rtc_power_off.
      Signed-off-by: default avatarKeerthy <j-keerthy@ti.com>
      Acked-by: default avatarAlexandre Belloni <alexandre.belloni@bootlin.com>
      [tony@atomide.com: folded in a fix for compile warning]
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      6256f7f7
  12. 31 Mar, 2019 2 commits
    • Linus Torvalds's avatar
      Linux 5.1-rc3 · 79a3aaa7
      Linus Torvalds authored
      79a3aaa7
    • Linus Torvalds's avatar
      Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm · 63fc9c23
      Linus Torvalds authored
      Pull KVM fixes from Paolo Bonzini:
       "A collection of x86 and ARM bugfixes, and some improvements to
        documentation.
      
        On top of this, a cleanup of kvm_para.h headers, which were exported
        by some architectures even though they not support KVM at all. This is
        responsible for all the Kbuild changes in the diffstat"
      
      * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (28 commits)
        Documentation: kvm: clarify KVM_SET_USER_MEMORY_REGION
        KVM: doc: Document the life cycle of a VM and its resources
        KVM: selftests: complete IO before migrating guest state
        KVM: selftests: disable stack protector for all KVM tests
        KVM: selftests: explicitly disable PIE for tests
        KVM: selftests: assert on exit reason in CR4/cpuid sync test
        KVM: x86: update %rip after emulating IO
        x86/kvm/hyper-v: avoid spurious pending stimer on vCPU init
        kvm/x86: Move MSR_IA32_ARCH_CAPABILITIES to array emulated_msrs
        KVM: x86: Emulate MSR_IA32_ARCH_CAPABILITIES on AMD hosts
        kvm: don't redefine flags as something else
        kvm: mmu: Used range based flushing in slot_handle_level_range
        KVM: export <linux/kvm_para.h> and <asm/kvm_para.h> iif KVM is supported
        KVM: x86: remove check on nr_mmu_pages in kvm_arch_commit_memory_region()
        kvm: nVMX: Add a vmentry check for HOST_SYSENTER_ESP and HOST_SYSENTER_EIP fields
        KVM: SVM: Workaround errata#1096 (insn_len maybe zero on SMAP violation)
        KVM: Reject device ioctls from processes other than the VM's creator
        KVM: doc: Fix incorrect word ordering regarding supported use of APIs
        KVM: x86: fix handling of role.cr4_pae and rename it to 'gpte_size'
        KVM: nVMX: Do not inherit quadrant and invalid for the root shadow EPT
        ...
      63fc9c23