- 19 Feb, 2018 40 commits
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Leo (Sunpeng) Li authored
When user-mode is using 8bpc, the hardware represents it internally using a higher bit depth. This causes problems when comparing CRCs for color managment tests. We need to disable dithering as well, since it makes CRC values non-deterministic. It's easy to see why dithering needs to be disabled, The reason why truncation also needs to be enabled is better described with an example. Consider the folowing which tests the color transform matrix (CTM): Expected CRC = FB_A -> Degamma (Bypassed) -> CTM (Bypassed) | v Obtain CRC <- Regamma(Bypassed) Actual CRC = FB_B -> Degamma (Bypassed) -> CTM (0.5*Identity) | v Obtain CRC <- Regamma(Bypassed) FB_A contains a solid red color at half intensity (127 @ 8bpc) FB_B contains a solid red color at full intensity (255 @ 8bpc) We expect that Expected CRC = Actual CRC, but that's not the case. When the CTM is applied, the output is at half intensity, but also at a higher bit depth within hardware. i.e. 255/2 = 127.5: not representable in 8bpc, but can be at 10bpc. This causes the two CRC's to be different. The solution is to truncate the output bit depth to the same as input when enabling CRC capture. Since Linux only supports 8bpc, hard code that for now. Signed-off-by:Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by:
Harry Wentland <Harry.Wentland@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Leo (Sunpeng) Li authored
We will need this to disable dither for CRC capture. Signed-off-by:
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Leo (Sunpeng) Li authored
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Leo (Sunpeng) Li authored
Hookup new color management functions into amdgpu_dm: - Notify DRM that we support CRTC color management during CRTC init - Call color management functions within atomic check to update dc states in preparation for a commit Signed-off-by:
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Leo (Sunpeng) Li authored
Implement color management functionalities within amdgpu_dm_color, and expose functions within amdgpu_dm.h. Signed-off-by:
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Leo (Sunpeng) Li authored
Also guard includes that we don't need. Signed-off-by:
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Leo (Sunpeng) Li authored
The MAX_LOW_POINT macro should reflect the maximum low point within hardware. Otherwise, sampling for the hardware points from the output transfer function (OTF) will be incorrect. Also, fix usage of MAX_LOW_POINT accordingly. Signed-off-by:
Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by:
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Harry Wentland authored
Signed-off-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
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Harry Wentland authored
Both functions are the same Signed-off-by:
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Harry Wentland authored
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Yongqiang Sun authored
This path fixed specific eDP panel cold boot black screen due to unnecessary enable link. Change: In case of boot up with eDP, if OS is going to set mode on eDP, keep eDP light up, do not disable and reset corresponding HW. This change may affect dce asics and S3/S4 Resume with multi-monitor. Signed-off-by:
Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by:
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Tony Cheng authored
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Dmytro Laktyushkin authored
Signed-off-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by:
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Martin Tsai authored
Signed-off-by:
Martin Tsai <martin.tsai@amd.com> Reviewed-by:
Charlene Liu <Charlene.Liu@amd.com> Acked-by:
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Harry Wentland authored
These should only be non-0 if big hammer w/a is implemented. Currently DC doesn't implement it, so leave them 0. Signed-off-by:
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Charlene Liu authored
Signed-off-by:
Anthony Koo <Anthony.Koo@amd.com> Acked-by:
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Tony Cheng authored
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Charlene Liu authored
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Hersen Wu authored
[Description] For MST, DC already notify MST sink for MST mode, DC stll check DP SINK DPCD register to see if MST enabled. DP RX firmware may not handle this properly. Signed-off-by:
Hersen Wu <hersenxs.wu@amd.com> Reviewed-by:
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John Barberiz authored
- Disabled HPD filter and used HPD software timer instead - Allows DM to disable HPD filtering Signed-off-by:
John Barberiz <jbarberi@amd.com> Reviewed-by:
Jun Lei <Jun.Lei@amd.com> Acked-by:
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Harry Wentland authored
v2: Use NULL and reverse christmas tree ordering Signed-off-by:
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Mikita Lipski authored
amdgpu_dm_display_resume is now called from dm_resume to unify DAL resume call into a single function call There is no more need to separately call 2 resume functions for DM. Initially they were separated to resume display state after cursor is pinned. But because there is no longer any corruption with the cursor - the calls can be merged into one function hook. Signed-off-by:
Mikita Lipski <mikita.lipski@amd.com> Reviewed-by:
Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by:
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Mikita Lipski authored
Inside amdgpu_gtt_mgr_fini add a missing lock to maintain locking balance Signed-off-by:
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Christian König authored
Start to use amdgpu_bo_create_reserved v2. v2: Fix missing pointer init to NULL. Remove extra new lines. Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Leo Liu <leo.liu@amd.com> Signed-off-by:
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Christian König authored
We didn't synced the BO after validating it. Also sart to use amdgpu_bo_create_reserved to simplify things. Signed-off-by:
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Harry Wentland authored
Missed that with a previous change that removed unused files. Signed-off-by:
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Christian König authored
The subsystem should check that, not the driver. Signed-off-by:
Roger He <Hongbo.He@amd.com> Signed-off-by:
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Christian König authored
The subsystem should check that, not the driver. Signed-off-by:
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Christian König authored
Stop calling the driver callback directly. Signed-off-by:
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Matthias Kaehlcke authored
calcs uses the compiler option -mpreferred-stack-boundary=4 to configure a stack alignment of 16 bytes. Clang uses the option -mstack-alignment instead, which expects as parameter the alignment in bytes, and not a power of two like -mpreferred-stack-boundary. Probe for both compiler options and use the correct one, similar to what is done in arch/x86/Makefile. Signed-off-by:
Matthias Kaehlcke <mka@chromium.org> Reviewed-by:
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Matthias Kaehlcke authored
DML uses the compiler option -mpreferred-stack-boundary=4 to configure a stack alignment of 16 bytes. Clang uses the option -mstack-alignment instead, which expects as parameter the alignment in bytes, and not a power of two like -mpreferred-stack-boundary. Probe for both compiler options and use the correct one, similar to what is done in arch/x86/Makefile. Reported-by:
Guenter Roeck <groeck@chromium.org> Signed-off-by:
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Matthias Kaehlcke authored
Use a variable for common CFLAGS instead of specifying the same flags for every source file. Signed-off-by:
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Matthias Kaehlcke authored
Use a variable for common CFLAGS instead of specifying the same flags for every source file. Signed-off-by:
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Shaoyun Liu authored
Add common smu_soc_asic_init function to emulate the sillicon post sequence Signed-off-by:
Shaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by:
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Shaoyun Liu authored
Signed-off-by:
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Shaoyun Liu authored
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Shaoyun Liu authored
On emulation mode , driver will be loaded with powerplay disabled Signed-off-by:
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Shaoyun Liu authored
Add amdgpu_emu_mode module parameter to control the emulation mode Avoid vbios operation on emulation since there is no vbios post duirng emulation, use the common hw_init to simulate the post Signed-off-by:
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Kai-Heng Feng authored
The affected system (0x0813) is pretty similar to another one (0x0812), it also needs to use ATPX power control. Signed-off-by:
Kai-Heng Feng <kai.heng.feng@canonical.com> Signed-off-by:
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Rex Zhu authored
As auto power profile mode still not support on vega10, so just restore default profile mode in auto dpm level. Reviewed-by:
Rex Zhu <Rex.Zhu@amd.com> Signed-off-by:
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