- 27 Mar, 2012 3 commits
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Russell King authored
Conflicts: arch/arm/Kconfig.debug arch/arm/plat-versatile/Kconfig Merge fixes: arch/arm/mach-integrator/Kconfig drivers/clocksource/Kconfig
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Russell King authored
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Russell King authored
Last night's randconfig and the allnoconfig builds spat out the following warning while building: warning: (ARM) selects HAVE_BPF_JIT which has unmet direct dependencies (NET) Acked-by: Mircea Gherzan <mgherzan@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- 24 Mar, 2012 29 commits
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Uwe Kleine-König authored
XIP_VIRT_ADDR is needed for XIP builds and currently only defined for builds with CONFIG_MMU. Also provide it for no-MMU builds to make it possible to build an XIP kernel for MMU-less machines. As these lack an MMU it has to be an identity mapping. Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Linus Walleij authored
This converts the Integrator AP/CP to use sparse IRQs. Tested on both machines. Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Mircea Gherzan authored
Based of Matt Evans's PPC64 implementation. The compiler generates ARM instructions but interworking is supported for Thumb2 kernels. Supports both little and big endian. Unaligned loads are emitted for ARMv6+. Not all the BPF opcodes that deal with ancillary data are supported. The scratch memory of the filter lives on the stack. Hardware integer division is used if it is available. Enabled in the same way as for x86-64 and PPC64: echo 1 > /proc/sys/net/core/bpf_jit_enable A value greater than 1 enables opcode output. Signed-off-by: Mircea Gherzan <mgherzan@gmail.com> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Eric Dumazet <eric.dumazet@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Rabin Vincent authored
Add the arch-specific code to support jump labels for ARM and Thumb-2. This code will only be activated on compilers that are capable of building it. It has been tested with GCC 4.6 patched with the patch from GCC bug 48637. Cc: Jason Baron <jbaron@redhat.com> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Rabin Vincent authored
Some versions of ARM GCC which do support asm goto, do not support the %c specifier. Since we need the %c to support jump labels on ARM, detect that too in the asm goto detection script to avoid build errors with these versions. http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48637Acked-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Nicolas Pitre authored
This is a very simple method for code running in an emulator, or under the supervision of a debugger, to use I/O facilities on the controlling host. Tested with OpenOCD, and ARM's Fast Models. Details on semihosting can be found in chapter 8 of DUI0203I_rvct_developer_guide.pdf from ARM Ltd. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Matt Fleming authored
As described in e6fa16ab ("signal: sigprocmask() should do retarget_shared_pending()") the modification of current->blocked is incorrect as we need to check for shared signals we're about to block. Also, use the new helper function introduced in commit 5e6292c0 ("signal: add block_sigmask() for adding sigmask to current->blocked") which centralises the code for updating current->blocked after successfully delivering a signal and reduces the amount of duplicate code across architectures. In the past some architectures got this code wrong, so using this helper function should stop that from happening again. Cc: Arnd Bergmann <arnd.bergmann@linaro.org> Cc: Dave Martin <dave.martin@linaro.org> Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Oleg Nesterov <oleg@redhat.com> Signed-off-by: Matt Fleming <matt.fleming@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Mathias Krause authored
The address limit is already set in flush_old_exec() so this set_fs(USER_DS) is redundant. Signed-off-by: Mathias Krause <minipli@googlemail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Rabin Vincent authored
Extract out the code patching code from kprobes so that it can be used from the jump label code. Additionally, the separated code: - Uses the IS_ENABLED() macros instead of the #ifdefs for THUMB2 support - Unifies the two separate functions in kprobes, providing one function that uses stop_machine() internally, and one that can be called from stop_machine() directly - Patches the text on all CPUs only on processors requiring software broadcasting of cache operations Acked-by: Jon Medhurst <tixy@yxit.co.uk> Tested-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Rabin Vincent authored
Extract out the instruction generation code so that it can be used for jump labels too. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Rabin Vincent authored
As commit 592201a9 (ARM: Thumb-2: Support Thumb-2 in undefined instruction handler) says: 32-bit Thumb instructions are specified in the form: ((first_half << 16 ) | second_half) which matches the layout used by the ARM ARM. Convert the ftrace code to use the same format to avoid the usage of different formats in kernel code. Acked-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Rabin Vincent authored
Before replacing an instruction, the ftrace code determines what the old instruction should be and verifies that that's what's really there in memory before replacing it. This is useful if for example a bug in mcountrecord causes it to record wrong locations. However, in cases where we replace call sites in entry-common.S, these checks are not needed. For these, we currently just memcpy() the memory content and then "verify" it -- this is quite useless and can be removed. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Will Deacon authored
The kexec machine crash code can be called in interrupt context via a sysrq trigger made using the magic key combination. If the irq chip dealing with the serial interrupt is using the fasteoi flow handler, then we will never EOI the interrupt because the interrupt handler will be fatal. In the case of a GIC, this results in the crash kernel not receiving interrupts on that CPU interface. This patch adds code (based on the PowerPC implementation) to EOI any pending interrupts on the crash CPU before masking and disabling all interrupts. Secondary cores are not a problem since they are placed into a cpu_relax() loop via an IPI. Reported-by: Lei Wen <leiwen@marvell.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
On Versatile Express, the PCI Express buses are broken and unusable, so we aren't going to support PCI/ISA IO cycles on this platform. Remove the PCI/ISA IO inb et.al. support for this platform. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
Avoid potential build problems caused by lacking mach/irqs.h includes on non-OF builds caused by an errant include in asm/prom.h. asm/prom.h requires nothing from asm/irq.h, as Grant says: On Mon, Feb 06, 2012 at 05:56:23AM +0000, Grant Likely wrote: > On Sat, Feb 04, 2012 at 10:17:48PM +0000, Russell King wrote: > > Finally, do we need asm/irq.h in our asm/prom.h ? That's causing > > fragility between DT and non-DT builds, because people are finding > > that their DT builds work without their mach/irqs.h includes but > > fail when built with non-DT. The only thing which DT might need - > > at the most - is NR_IRQS, but I'd hope with things like irq domains > > it doesn't actually require it. > > I don't think so. There may be a file or two that break because they're > not including everything they need, but I don't think anything in the > header requires it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Javi Merino authored
Print debug information on user faults for SIGBUS if user_debug = 16 in the kernel command line. Reference: <1327333344-26340-1-git-send-email-javi.merino@arm.com> Signed-off-by: Javi Merino <javi.merino@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Will Deacon authored
The irq_start and hwirq_base assignment code is fairly hairy and ended up being difficult to read following a conflict resolution for 3.2. This patch rearranges the code slightly to make it easier to read. Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Will Deacon authored
ARM unconditionally selects CONFIG_GENERIC_HARDIRQS, so the definition of for_each_irq_desc will check that the desc is non-NULL anyway. This patch removes a redundant check from the IRQ migration code. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Will Deacon authored
Cortex-A7 implements an ARMv7-compatible PMU compliant with the PMUv2 architecture specification. This patch adds support for the PMU to the ARM perf backend. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
Ensure that the software state for sched_clock() is updated at the point of suspend so that we avoid losing ticks since the last update. This prevents the platform dependent possibility that sched_clock() may appear to go backwards across a suspend/resume cycle. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
Add the compiled ISA to oops dumps, along side the preempt/smp configuration. This allows us to see immediately whether the kernel was compiled for Thumb-2 or not. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
The compiler does not conditionalize the assembly instructions for the tlb operations, which leads to sub-optimal code being generated when building a kernel for multiple CPUs. We can tweak things fairly simply as the code fragment below shows: 17f8: e3120001 tst r2, #1 ; 0x1 ... 1800: 0a000000 beq 1808 <handle_pte_fault+0x194> 1804: ee061f10 mcr 15, 0, r1, cr6, cr0, {0} 1808: e3120004 tst r2, #4 ; 0x4 180c: 0a000000 beq 1814 <handle_pte_fault+0x1a0> 1810: ee081f36 mcr 15, 0, r1, cr8, cr6, {1} becomes: 17f0: e3120001 tst r2, #1 ; 0x1 17f4: 1e063f10 mcrne 15, 0, r3, cr6, cr0, {0} 17f8: e3120004 tst r2, #4 ; 0x4 17fc: 1e083f36 mcrne 15, 0, r3, cr8, cr6, {1} Overall, for Realview with V6 and V7 CPUs configured: text data bss dec hex filename 4153998 207340 5371036 9732374 948116 ../build/realview/vmlinux.before 4153366 207332 5371036 9731734 947e96 ../build/realview/vmlinux.after Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Uwe Kleine-König authored
This line is irritating and wrong when modules are not supported, so don't show it then. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Imre Kaloz authored
Wire up support for the XZ decompressor Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Dave Martin authored
This patch adds some endianness-agnostic helpers to convert machine instructions between canonical integer form and in-memory representation. A canonical integer form for representing instructions is also formalised here. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nico@linaro.org> Tested-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Linus Walleij authored
Now that we can select a sched_clock at runtime, let's implement it for the Integrator AP, default-select the one found in all other board it for all plat-versatile boards and make the right clock kick in at runtime. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Will Deacon authored
The current user mapping for the vectors page is inserted as a `horrible hack vma' into each task via arch_setup_additional_pages. This causes problems with the MM subsystem and vm_normal_page, as described here: https://lkml.org/lkml/2012/1/14/55 Following the suggestion from Hugh in the above thread, this patch uses the gate_vma for the vectors user mapping, therefore consolidating the horrible hack VMAs into one. Acked-and-Tested-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
Avoid namespace conflicts with drivers over the CP15 definitions by moving CP15 related prototypes and definitions to a private header file. Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> [Tegra] Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Tested-by: H Hartley Sweeten <hsweeten@visionengravers.com> [EP93xx] Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
Rather than open-coding the jiffy-based wait, and polling for the secondary CPU to come online, use a completion instead. This removes the need to poll, instead we will be notified when the secondary CPU has initialized. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- 08 Mar, 2012 1 commit
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Russell King authored
Merge branch 'sched_clock-for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into devel-stable
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- 24 Feb, 2012 1 commit
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Stephen Boyd authored
Now that sched_clock is mandatory on ARM it's simple to add sched_clock support to the MSM timer code. Add it so that we get more accurate sched_clock output than the jiffies based version that's provided by default. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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- 23 Feb, 2012 1 commit
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Rob Herring authored
As part of mach/irqs.h include removal from sparse, mainstone.h was missed. This fixes the compile of the pcmcia driver. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- 04 Feb, 2012 2 commits
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Russell King authored
Merge branch 'sched_clock-for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into devel-stable
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- 03 Feb, 2012 3 commits
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Marc Zyngier authored
All sched_clock() providers have been converted to the sched_clock framework, which also provides a jiffy based implementation for the platforms that do not provide a counter. It is now possible to make the sched_clock framework mandatory, effectively preventing new platforms to add new sched_clock() functions, which would be detrimental to the single zImage work. Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Marc Zyngier authored
Prima2 has its own sched_clock() implementation, which gets in the way of a single zImage. Moving to the common sched_clock framework makes the code slightly cleaner (the mapping hack in sched_clock() goes away...). Acked-by: Barry Song <baohua.song@csr.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Marc Zyngier authored
Davinci has its own sched_clock() implementation, which gets in the way of a single zImage. Moving to the common sched_clock framework makes the code slightly cleaner. Acked-by: Sekhar Nori <nsekhar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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