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  1. 11 Jun, 2015 1 commit
    • Alexey Kardashevskiy's avatar
      powerpc/spapr: vfio: Replace iommu_table with iommu_table_group · b348aa65
      Alexey Kardashevskiy authored
      Modern IBM POWERPC systems support multiple (currently two) TCE tables
      per IOMMU group (a.k.a. PE). This adds a iommu_table_group container
      for TCE tables. Right now just one table is supported.
      
      This defines iommu_table_group struct which stores pointers to
      iommu_group and iommu_table(s). This replaces iommu_table with
      iommu_table_group where iommu_table was used to identify a group:
      - iommu_register_group();
      - iommudata of generic iommu_group;
      
      This removes @data from iommu_table as it_table_group provides
      same access to pnv_ioda_pe.
      
      For IODA, instead of embedding iommu_table, the new iommu_table_group
      keeps pointers to those. The iommu_table structs are allocated
      dynamically.
      
      For P5IOC2, both iommu_table_group and iommu_table are embedded into
      PE struct. As there is no EEH and SRIOV support for P5IOC2,
      iommu_free_table() should not be called on iommu_table struct pointers
      so we can keep it embedded in pnv_phb::p5ioc2.
      
      For pSeries, this replaces multiple calls of kzalloc_node() with a new
      iommu_pseries_alloc_group() helper and stores the table group struct
      pointer into the pci_dn struct. For release, a iommu_table_free_group()
      helper is added.
      
      This moves iommu_table struct allocation from SR-IOV code to
      the generic DMA initialization code in pnv_pci_ioda_setup_dma_pe and
      pnv_pci_ioda2_setup_dma_pe as this is where DMA is actually initialized.
      This change is here because those lines had to be changed anyway.
      
      This should cause no behavioural change.
      Signed-off-by: default avatarAlexey Kardashevskiy <aik@ozlabs.ru>
      [aw: for the vfio related changes]
      Acked-by: default avatarAlex Williamson <alex.williamson@redhat.com>
      Reviewed-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
      Reviewed-by: default avatarGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
      b348aa65
  2. 03 Jun, 2015 3 commits
  3. 02 Jun, 2015 1 commit
  4. 22 May, 2015 1 commit
  5. 11 Apr, 2015 7 commits
  6. 31 Mar, 2015 6 commits
  7. 24 Mar, 2015 4 commits
  8. 30 Jan, 2015 1 commit
  9. 24 Nov, 2014 1 commit
  10. 14 Aug, 2013 1 commit
  11. 24 Jul, 2013 1 commit
    • Gavin Shan's avatar
      powerpc/eeh: Keep PE during hotplug · 807a827d
      Gavin Shan authored
      When we do normal hotplug, the PE (shadow EEH structure) shouldn't be
      kept around.
      
      However, we need to keep it if the hotplug an artifial one caused by
      EEH errors recovery.
      
      Since we remove EEH device through the PCI hook pcibios_release_device(),
      the flag "purge_pe" passed to various functions is meaningless. So the patch
      removes the meaningless flag and introduce new flag "EEH_PE_KEEP"
      to save the PE while doing hotplug during EEH error recovery.
      Signed-off-by: default avatarGavin Shan <shangw@linux.vnet.ibm.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      807a827d
  12. 24 May, 2013 1 commit
  13. 06 May, 2013 1 commit
    • Benjamin Herrenschmidt's avatar
      powerpc/pci: Support per-aperture memory offset · 3fd47f06
      Benjamin Herrenschmidt authored
      The PCI core supports an offset per aperture nowadays but our arch
      code still has a single offset per host bridge representing the
      difference betwen CPU memory addresses and PCI MMIO addresses.
      
      This is a problem as new machines and hypervisor versions are
      coming out where the 64-bit windows will have a different offset
      (basically mapped 1:1) from the 32-bit windows.
      
      This fixes it by using separate offsets. In the long run, we probably
      want to get rid of that intermediary struct pci_controller and have
      those directly stored into the pci_host_bridge as they are parsed
      but this will be a more invasive change.
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      3fd47f06
  14. 05 May, 2013 1 commit
  15. 10 Apr, 2013 2 commits
  16. 18 Sep, 2012 2 commits
    • Gavin Shan's avatar
      powerpc/eeh: Fix crash on converting OF node to edev · 1e38b714
      Gavin Shan authored
      The kernel crash was reported by Alexy. He was testing some feature
      with private kernel, in which Alexy added some code in pci_pm_reset()
      to read the CSR after writting it. The bug could be reproduced on
      Fiber Channel card (Fibre Channel: Emulex Corporation Saturn-X:
      LightPulse Fibre Channel Host Adapter (rev 03)) by the following
      commands.
      
      	# echo 1 > /sys/devices/pci0004:01/0004:01:00.0/reset
      	# rmmod lpfc
      	# modprobe lpfc
      
      The history behind the test case is that those additional config
      space reading operations in pci_pm_reset() would cause EEH error,
      but we didn't detect EEH error until "modprobe lpfc". For the case,
      all the PCI devices on PCI bus (0004:01) were removed and added after
      PE reset. Then the EEH devices would be figured out again based on
      the OF nodes. Unfortunately, there were some child OF nodes under
      PCI device (0004:01:00.0), but they didn't have attached PCI_DN since
      they're invisible from PCI domain. However, we were still trying to
      convert OF node to EEH device without checking on the attached PCI_DN.
      Eventually, it caused the kernel crash as follows:
      
      Unable to handle kernel paging request for data at address 0x00000030
      Faulting instruction address: 0xc00000000004d888
      cpu 0x0: Vector: 300 (Data Access) at [c000000fc797b950]
          pc: c00000000004d888: .eeh_add_device_tree_early+0x78/0x140
          lr: c00000000004d880: .eeh_add_device_tree_early+0x70/0x140
          sp: c000000fc797bbd0
         msr: 8000000000009032
         dar: 30
       dsisr: 40000000
        current = 0xc000000fc78d9f70
        paca    = 0xc00000000edb0000   softe: 0        irq_happened: 0x00
          pid   = 2951, comm = eehd
      enter ? for help
      [c000000fc797bc50] c00000000004d848 .eeh_add_device_tree_early+0x38/0x140
      [c000000fc797bcd0] c00000000004d848 .eeh_add_device_tree_early+0x38/0x140
      [c000000fc797bd50] c000000000051b54 .pcibios_add_pci_devices+0x34/0x190
      [c000000fc797bde0] c00000000004fb10 .eeh_reset_device+0x100/0x160
      [c000000fc797be70] c0000000000502dc .eeh_handle_event+0x19c/0x300
      [c000000fc797bf00] c000000000050570 .eeh_event_handler+0x130/0x1a0
      [c000000fc797bf90] c000000000020138 .kernel_thread+0x54/0x70
      
      The patch changes of_node_to_eeh_dev() and just returns NULL if the
      passed OF node doesn't have attached PCI_DN.
      
      Cc: stable@vger.kernel.org
      Reported-by: default avatarAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: default avatarGavin Shan <shangw@linux.vnet.ibm.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      1e38b714
    • Gavin Shan's avatar
      powerpc/eeh: Remove EEH PE for normal PCI hotplug · 20ee6a97
      Gavin Shan authored
      Function eeh_rmv_from_parent_pe() could be called by the path of
      either normal PCI hotplug, or EEH recovery. For the former case,
      we need purge the corresponding PE on removal of the associated
      PE bus.
      
      The patch tries to cover that by passing more information to function
      pcibios_remove_pci_devices() so that we know if the corresponding PE
      needs to be purged or be marked as "invalid".
      Signed-off-by: default avatarGavin Shan <shangw@linux.vnet.ibm.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      20ee6a97
  17. 09 Sep, 2012 1 commit
  18. 13 Jun, 2012 1 commit
  19. 28 Mar, 2012 2 commits
  20. 06 Jan, 2012 1 commit
  21. 25 Nov, 2011 1 commit
    • Benjamin Herrenschmidt's avatar
      powerpc/powernv: PCI support for p7IOC under OPAL v2 · 184cd4a3
      Benjamin Herrenschmidt authored
      This adds support for p7IOC (and possibly other IODA v1 IO Hubs)
      using OPAL v2 interfaces.
      
      We completely take over resource assignment and assign them using an
      algorithm that hands out device BARs in a way that makes them fit in
      individual segments of the M32 window of the bridge, which enables us
      to assign individual PEs to devices and functions.
      
      The current implementation gives out a PE per functions on PCIe, and a
      PE for the entire bridge for PCIe to PCI-X bridges.
      
      This can be adjusted / fine tuned later.
      
      We also setup DMA resources (32-bit only for now) and MSIs (both 32-bit
      and 64-bit MSI are supported).
      
      The DMA allocation tries to divide the available 256M segments of the
      32-bit DMA address space "fairly" among PEs. This is done using a
      "weight" heuristic which assigns less value to things like OHCI USB
      controllers than, for example SCSI RAID controllers. This algorithm
      will probably want some fine tuning for specific devices or device
      types.
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      184cd4a3