- 19 Mar, 2019 21 commits
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Huang Rui authored
This patch adds placeholder of smu_initialize_pptable for smu. Signed-off-by:
Huang Rui <ray.huang@amd.com> Acked-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Huang Rui authored
This patch adds interface to read pptable from vbios for smu. Signed-off-by:
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Huang Rui authored
This patch adds fw load checking interface for smu. Signed-off-by:
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Huang Rui authored
This patch adds firmware loading interface for smu. Signed-off-by:
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Huang Rui authored
This patch add smu11 sub ip block skeleton as placeholder Signed-off-by:
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Huang Rui authored
This patch add amdgpu_smu ip block skeleton as placeholder. We plan use new smu ip block from Vega20. Signed-off-by:
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YueHaibing authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/amdgpu/si_dpm.c: In function 'si_program_response_times': drivers/gpu/drm/amd/amdgpu/si_dpm.c:4101:29: warning: variable 'backbias_response_time' set but not used [-Wunused-but-set-variable] It's never used since introduction in 841686df ("drm/amdgpu: add SI DPM support (v4)"), so can be removed Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Signed-off-by:
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YueHaibing authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c: In function 'update_gpuvm_pte': drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c:840:20: warning: variable 'bo' set but not used [-Wunused-but-set-variable] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c:838:20: warning: variable 'vm' set but not used [-Wunused-but-set-variable] They're never used since introduction in a46a2cd1 ("drm/amdgpu: Add GPUVM memory management functions for KFD") Signed-off-by:
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YueHaibing authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/ttm/ttm_execbuf_util.c: In function 'ttm_eu_fence_buffer_objects': drivers/gpu/drm/ttm/ttm_execbuf_util.c:191:24: warning: variable 'bdev' set but not used [-Wunused-but-set-variable] It's not used any more and can be removed. Signed-off-by:
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Yong Zhao authored
This is recommended by HW designers. Previously when it was set to 1, the PDE walk error in VM fault will be treated as PERMISSION_OR_INVALID_PAGE_FAULT rather than usually expected OTHER_FAULT. As a result, the retry control in VM_CONTEXT*_CNTL will change accordingly. The above behavior is kind of abnormal. Furthermore, the PDE_FAULT_CLASSIFICATION == 1 feature was targeted for very old ASICs and it never made it way to production. Therefore, we should set it to 0. Signed-off-by:
Yong Zhao <Yong.Zhao@amd.com> Acked-by:
Christian König <christian.koenig@amd.com> Acked-by:
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Yong Zhao authored
All the gmc_*_set_pde_pte functions are the same across different ASICs, so we can eliminate the set_pde_pte function pointer and instead use a generic function. Signed-off-by:
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Felix Kuehling authored
Don't account for them in other zones such as dma32. The kernel page allocator has its own heuristics to avoid exhausting special zones for regular kernel allocations. Signed-off-by:
Felix Kuehling <Felix.Kuehling@amd.com> Acked-by:
Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by:
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Thomas Zimmermann authored
GEM defines DRM_FILE_PAGE_OFFSET_{START,SIZE} constants for the mmap-able range of addresses. TTM can use them as well. Signed-off-by:Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
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Thomas Zimmermann authored
A BO's address has to be at least the minimum offset. Sharing this test in ttm_bo_mmap() removes code from drivers. A full buffer-address validation is still done within drm_vma_offset_lockup_locked(). Signed-off-by:
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Thomas Zimmermann authored
The parameter file_page_offset is a constant shared by all drivers. Just replace it with the constant itself. Signed-off-by:
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Thomas Zimmermann authored
Most TTM drivers define the constant DRM_FILE_PAGE_OFFSET of the same value. The only exception is vboxvideo, which is being converted to the new offset by this patch. Unifying the constants in a single place simplifies the driver code. Signed-off-by:
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Thomas Zimmermann authored
The vboxvideo driver mmaps BOs at 0x10000000 or higher. Changing the offset to 0x100000000 aligns the driver with all other DRM drivers. Signed-off-by:
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Philip Yang authored
Only select HMM_MIRROR will get kernel config dependency warnings if CONFIG_HMM is missing in the config. Add depends on HMM will solve the issue. Add conditional compilation to fix compilation errors if HMM_MIRROR is not enabled as HMM config is not enabled. Remove unused function amdgpu_ttm_tt_mark_user_pages. Signed-off-by:
Philip Yang <Philip.Yang@amd.com> Reviewed-by:
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Philip Yang authored
Use HMM helper function hmm_vma_fault() to get physical pages backing userptr and start CPU page table update track of those pages. Then use hmm_vma_range_done() to check if those pages are updated before amdgpu_cs_submit for gfx or before user queues are resumed for kfd. If userptr pages are updated, for gfx, amdgpu_cs_ioctl will restart from scratch, for kfd, restore worker is rescheduled to retry. HMM simplify the CPU page table concurrent update check, so remove guptasklock, mmu_invalidations, last_set_pages fields from amdgpu_ttm_tt struct. HMM does not pin the page (increase page ref count), so remove related operations like release_pages(), put_page(), mark_page_dirty(). Signed-off-by:
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Philip Yang authored
There is circular lock between gfx and kfd path with HMM change: lock(dqm) -> bo::reserve -> amdgpu_mn_lock To avoid this, move init/unint_mqd() out of lock(dqm), to remove nested locking between mmap_sem and bo::reserve. The locking order is: bo::reserve -> amdgpu_mn_lock(p->mn) Signed-off-by:
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Philip Yang authored
Replace our MMU notifier with hmm_mirror_ops.sync_cpu_device_pagetables callback. Enable CONFIG_HMM and CONFIG_HMM_MIRROR as a dependency in DRM_AMDGPU_USERPTR Kconfig. It supports both KFD userptr and gfx userptr paths. Signed-off-by:
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- 05 Mar, 2019 19 commits
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Alex Deucher authored
Use BACO for reset of the platform supports it. Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Alex Deucher authored
Several of the BACO functions are common across smu9-based asics. Split the common code out. Reviewed-by:
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Alex Deucher authored
This implements BACO (Bus Active, Chip Off) support for vega12. Reviewed-by:
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Mark McGarrity authored
Signed-off-by:
Mark McGarrity <mark.mcgarrity@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
Leo Li <sunpeng.li@amd.com> Signed-off-by:
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Jun Lei authored
Add a dc_bounding_box_overrides struct to define bb overrides. It is loaded in during DC init. Signed-off-by:
Jun Lei <Jun.Lei@amd.com> Reviewed-by:
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David Francis authored
[Why] dc_commit_updates_for_stream is called twice per stream: once with the flip data and once will all other data. This causes problems when these DC calls have different numbers of planes For example, a commit with a pageflip on plane A and a non-pageflip change on plane B will first call into DC with just plane A, causing plane B to be disabled. Then it will call into DC with both planes, re-enabling plane B [How] Merge flip and full into a single bundle Apart from the single DC call, the logic should not be changed by this patch Signed-off-by:
David Francis <David.Francis@amd.com> Reviewed-by:
Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by:
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Josip Pavic authored
[Why] eDP v1.4 allows panels to report link rates other than RBR/HBR/HBR2, that may be more optimal for the panel's timing. Power can be saved by using a link rate closer to the required bandwidth of the panel's timing. [How] Scan the table of reported link rates from the panel, and select the minimum link rate that satisfies the bandwidth requirements of the panel's timing. Include a flag to make the feature optional. Signed-off-by:
Josip Pavic <Josip.Pavic@amd.com> Reviewed-by:
Harry Wentland <Harry.Wentland@amd.com> Acked-by:
Anthony Koo <Anthony.Koo@amd.com> Acked-by:
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Jun Lei authored
Will be used to signify if P-state change is supported. Signed-off-by:
Eric Yang <eric.yang2@amd.com> Acked-by:
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David Francis authored
[Why] The wait_for_vblank boolean in commit_tail was passed by reference into each stream commit, and if that commit was an asynchronous flip, it would disable vblank waits on all subsequent flips. This made the behaviour depend on crtc order in a non-intuitive way, although since the asynchronous pageflip flag is only used by the legacy IOCTLs at the moment it is never an issue [How] Find wait_for_vblank before doing any stream commits Signed-off-by:
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Wesley Chalmers authored
[WHY] When doing split pipe, if one pipe is pending on flip, the entire plane's status should be flip pending, otherwise corruption can occur when OS writes to a surface prematurely. [HOW] Clear the flip pending bit before checking pipes, then OR the flip pending bits from all pipes together to create the flip pending status of the entire plane. Signed-off-by:
Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by:
Eryk Brol <Eryk.Brol@amd.com> Acked-by:
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Anthony Koo authored
[Why] AUX arbitration occurs between SW and FW components. When AUX acquire fails, it causes engine->ddc to be NULL, which leads to an exception when we try to release the AUX engine. [How] When AUX engine acquire fails, it should return from the function without trying to continue the operation. The upper level will determine if it wants to retry. i.e. dce_aux_transfer_with_retries will be used and retry. Signed-off-by:
Aric Cyr <Aric.Cyr@amd.com> Acked-by:
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Nicholas Kazlauskas authored
[Why] Seamless boot tries to reuse planes that were enabled for the first commit applied. In the case where Raven is booting with two monitors connected and the first commit contains two streams the screen corruption would occur because the second stream was trying to re-use a tg and plane that weren't previously enabled. The state on the first commit looks something like the following: TG0: enabled=1 TG1: enabled=0 TG2: enabled=0 TG3: enabled=0 New state: pipe=0, stream=0, plane=0, new_tg=0 New state: pipe=1, stream=1, plane=1, new_tg=1 New state: pipe=2, stream=NULL, plane=NULL, new_tg=NULL New state: pipe=3, stream=NULL, plane=NULL, new_tg=NULL Only one plane/tg is setup before we enter accelerated mode so we really want to disabling everything but that first plane. [How] Check if the stream is not NULL and if the tg is enabled before deciding whether to skip the plane disable. Also ensure we're also disabling on the current state's pipe_ctx so we don't overwrite the fields in the new pending state. Signed-off-by:
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Dmytro Laktyushkin authored
This change changes dc add plane logic to allow plane-less resource reservation (pipe split). If a free pipe_ctx (no plane_state attached) is the head pipe, and is found with a bottom pipe attached, assign the plane to add on the bottom pipe. In addition, prepend dcn10 to dcn10-specific reset_back_end_for_pipe and reset_hw_ctx_wrap Signed-off-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by:
Charlene Liu <Charlene.Liu@amd.com> Acked-by:
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Charlene Liu authored
Driver need to poll the SURFACE_INUSE register to determine when to start the new task and write data to the checked surface. Implement the wait functions, and add the necessary hubbub registers. Signed-off-by:
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Eryk Brol authored
[Why] For later use by the DC VM implementation Signed-off-by:
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Anthony Koo authored
[Why] Seamless boot code not working on all ASICs because of some underflow issues caused by some uninitialized HW state. [How] Keep some logical and power gating init code in hw_init. Move some per pipe init code to enable accelerated mode Signed-off-by:
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Fatemeh Darbehani authored
[Why] DM has impelemented new pp_smu interface. 'Else' is not longer needed. Signed-off-by:
Fatemeh Darbehani <fatemeh.darbehani@amd.com> Reviewed-by:
Yongqiang Sun <yongqiang.sun@amd.com> Signed-off-by:
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Eric Bernstein authored
This enum definition is shared, so move it to a shared location. Signed-off-by:
Eric Bernstein <eric.bernstein@amd.com> Reviewed-by:
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mmcgarri authored
Signed-off-by:
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