- 17 Jun, 2013 4 commits
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Ville Syrjälä authored
plane->enabled is never set, so this code didn't do anything. Also drm_fb_helper_restore_fbdev_mode() will now disable all cursors and sprites for us, so we don't have to bother anymore. Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
Dave Airlie <airlied@gmail.com>
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Ville Syrjälä authored
v2: Follow the drm_crtc documentation fixes Signed-off-by:
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Ville Syrjälä authored
Cursors and plane can obscure whatever fbdev wants to show the user. Disable them all in drm_fb_helper_restore_fbdev_mode. After the cursors and planes have been disabled, user space needs to explicitly re-enable them to make them visible again. Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
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Ville Syrjälä authored
drm_plane_force_disable() will forcibly disable the plane even if user had previously requested the plane to be enabled. This can be used to force planes to be off when restoring the fbdev mode. The code was simply pulled from drm_framebuffer_remove(), which now calls the new function as well. v2: Check plane->fb in drm_plane_force_disable(), drop bogus comment about disabling crtc Signed-off-by:
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- 10 Jun, 2013 16 commits
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Ville Syrjälä authored
Having both modes can be beneficial for video playback cases. If you can match the video framerate exactly, and the audio and video clocks come from the same source, you should be able to avoid dropped/repeated frames without expensive operations such as resampling the audio to match video output rate. Rather than add both variants based on the CEA extension short video descriptors in do_cea_modes(), add only one variant there. Once all the EDID has been fully probed, do a loop over the entire probed mode list, during which we add the other variants for all modes that match CEA modes. This allows us to match modes that didn't come via the CEA short video descriptors. For example one Samsung TV here doesn't have the 640x480-60 mode as a SVD, but instead it's specified via a detailed timing descriptor. Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Ville Syrjälä authored
We want to disable the cursor by calling ->cursor_set() with handle=0 from places where we don't have a file_priv, so don't try to access it unless necessary. Signed-off-by:
Jakob Bornecrantz <jakob@vmware.com> Signed-off-by:
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Ville Syrjälä authored
Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Dave Airlie authored
Merge tag 'drm-intel-next-2013-06-01' of git://people.freedesktop.org/~danvet/drm-intel into drm-next Daniel writes: Another round of drm-intel-next for 3.11. Highlights: - Haswell IPS support (Paulo Zanoni) - VECS support on Haswell (Ben Widawsky, Xiang Haihao, ...) - Haswell watermark fixes (Paulo Zanoni) - "Make the gun bigger again" multithread fence fix from Chris. - i915_error_state finnally no longer fails with -ENOMEM! Big thanks to Mika for tackling this. - vlv sideband locking fixes from Jani - Hangcheck prep work for arb_robustness support (Mika&Chris) - edp vs cpu port confusion clean-up from Imre - pile of smaller fixes and cleanups all over. * tag 'drm-intel-next-2013-06-01' of git://people.freedesktop.org/~danvet/drm-intel: (70 commits) drm/i915: add i915_ips_status debugfs entry drm/i915: add enable_ips module option drm/i915: implement IPS feature drm/i915: fix up the edp power well check drm/i915: add I915_PARAM_HAS_VEBOX to i915_getparam drm/i915: add I915_EXEC_VEBOX to i915_gem_do_execbuffer() drm/i915: add VEBOX into debugfs drm/i915: Enable vebox interrupts drm/i915: vebox interrupt get/put drm/i915: consolidate interrupt naming scheme drm/i915: Convert irq_refounct to struct drm/i915: make PM interrupt writes non-destructive drm/i915: Add PM regs to pre/post install drm/i915: Create an ivybridge_irq_preinstall drm/i915: Create a more generic pm handler for hsw+ drm/i915: add support for 5/6 data buffer partitioning on Haswell drm/i915: properly set HSW WM_LP watermarks drm/i915: properly set HSW WM_PIPE registers drm/i915: fix pch_nop support drm/i915: Vebox ringbuffer init ...
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Ville Syrjälä authored
Keeping the modes sorted by vrefresh before the pixel clock makes the mode list somehow more pleasing to the eye. Signed-off-by:
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Ville Syrjälä authored
Keeping the modes in the same order as we probe them makes it a bit easier to track what's happening. Signed-off-by:
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Ville Syrjälä authored
Preserve the destination mode's list head in drm_mode_copy. Just in case someone decides that it's a good idea to overwrite a mode which happens to be on some list, Signed-off-by:
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Thomas Meyer authored
Signed-off-by:
Thomas Meyer <thomas@m3y3r.de> Signed-off-by:
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Thomas Meyer authored
Signed-off-by:
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Thomas Meyer authored
Signed-off-by:
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git://linuxtv.org/pinchartl/fbdevDave Airlie authored
GEM CMA PRIME support from Laurent. * 'drm/next' of git://linuxtv.org/pinchartl/fbdev: drm: GEM CMA: Add DRM PRIME support drm: GEM CMA: Split object mapping into GEM mapping and CMA mapping drm: GEM CMA: Split object creation into object alloc and DMA memory alloc drm/omap: Use drm_gem_mmap_obj() to implement dma-buf mmap drm/gem: Split drm_gem_mmap() into object search and object mapping
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Ville Syrjälä authored
The structures and strings involved with various pretty-print functions aren't meant to be modified, so make them all const. The exception is drm_connector_enum_list which does get modified in drm_connector_init(). While at it move the drm_get_connector_status_name() prototype from drmP.h to drm_crtc.h where it belongs. Signed-off-by:
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Ville Syrjälä authored
Use drm_get_format_name to print more readable pixel format names in debug output. Also unify the debug messages to say "unsupported pixel format", which better describes what is going on. Signed-off-by:
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Ville Syrjälä authored
Rather than just printing the pixel format as a hex number, decode the fourcc into human readable form, and also decode the LE vs. BE flag. Keep printing the raw hex number too in case it contains non-printable characters. Some examples what the new drm_get_format_name() produces: DRM_FORMAT_XRGB8888: "XR24 little-endian (0x34325258)" DRM_FORMAT_YUYV: "YUYV little-endian (0x56595559)" DRM_FORMAT_RGB565|DRM_FORMAT_BIG_ENDIAN: "RG16 big-endian (0xb6314752)" Unprintable characters: "D??? big-endian (0xff7f0244)" v2: Fix patch author Signed-off-by:
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Maarten Lankhorst authored
This allows importing bo's to own device to work without requiring that the buffer is pinned in GART. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Reviewed-by:
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Maarten Lankhorst authored
Prevents buffers from being pinned forever. Signed-off-by:
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- 08 Jun, 2013 5 commits
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Laurent Pinchart authored
Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by:
Rob Clark <robdclark@gmail.com>
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Laurent Pinchart authored
The CMA-specific mapping code will be used to implement dma-buf mmap support. Signed-off-by:
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Laurent Pinchart authored
This allows creating a GEM CMA object without an associated DMA memory buffer, and will be used to implement DRM PRIME support. Signed-off-by:
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Laurent Pinchart authored
The dma-buf mmap code was copied from the GEM mmap implementation. Replace it with the new drm_gem_mmap_obj() function. Signed-off-by:
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Laurent Pinchart authored
The drm_gem_mmap() function first finds the GEM object to be mapped based on the fake mmap offset and then maps the object. Split the object mapping code into a standalone drm_gem_mmap_obj() function that can be used to implement dma-buf mmap() operations. Signed-off-by:
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- 03 Jun, 2013 4 commits
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Steffen Trumtrar authored
Signed-off-by:
Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by:
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Steffen Trumtrar authored
Signed-off-by:
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Steffen Trumtrar authored
Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by:
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Steffen Trumtrar authored
As the device_node pointer is not changed in of_get_display_timing and parse_timing_property it can be a const pointer. Signed-off-by:
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- 31 May, 2013 11 commits
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Paulo Zanoni authored
It just prints whether it's supported/enabled/disabled. Feature requested by the power management team. v2: Checkpatch started complaining about seq_printf with 1 argument. Requested-by:
Kristen Accardi <kristen.c.accardi@intel.com> Signed-off-by:
Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by:
Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by:
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Paulo Zanoni authored
IPS is still enabled by default. Feature requested by the power management team. This should also help testing the feature on some early pre-production hardware where there were relationship problems between IPS and PSR. v2: Rebase on top of the newest IPS implementation. v3: Check i915_enable_ips at compute_config, not supports_ips, so the kernel parameter will be ignored at haswell_get_pipe_config. Requested-by: -
Paulo Zanoni authored
Intermediate Pixel Storage is a feature that should reduce the number of times the display engine wakes up memory to read pixels, so it should allow deeper PC states. IPS can only be enabled on ULT pipe A with 8:8:8 pipe pixel formats. With eDP 1920x1080 and correct watermarks but without FBC this moves my PC7 residency from 2.5% to around 38%. v2: - It's tied to pipe A, not port A - Add pipe_config support (Chris) - Add some assertions (Chris) - Rebase against latest dinq v3: - Don't ever set ips_enabled to false (Daniel) - Only check for ips_enabled at hsw_disable_ips (Daniel) v4: - Add hsw_compute_ips_config (Daniel) - Use the new dump_pipe_config (Daniel) Signed-off-by: -
Daniel Vetter authored
Now that we track the cpu transcoder we need accurately in the pipe config we can finally fix up the transcoder check. With the current code eDP on port D will be broken since we'd errornously cut the power. For reference see commit 2124b72e Author: Paulo Zanoni <paulo.r.zanoni@intel.com> Date: Fri Mar 22 14:07:23 2013 -0300 drm/i915: don't disable the power well yet v2: - Kill the now outdated comment (Paulo) - Add the missing crtc->base.enabled check and consolidate it (Paulo) - Smash all checks together, looks neater that way. v3: Kill the unused encoder variable. Cc: Takashi Iwai <tiwai@suse.de> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by:
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Xiang, Haihao authored
This will let userland only try to use the new ring when the appropriate kernel is present Signed-off-by:
Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by:
Damien Lespiau <damien.lespiau@intel.com> Signed-off-by:
Ben Widawsky <ben@bwidawsk.net> Signed-off-by:
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Xiang, Haihao authored
A user can run batchbuffer via VEBOX ring. Signed-off-by:
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Xiang, Haihao authored
v2: Removed rebase relic VECS ring from i915_gem_request_info (Damien) v3: s/hsw/hws in debugfs which I introduced in v2 (Jon) Signed-off-by:
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Ben Widawsky authored
Similar to a patch originally written by: v2: Reversed the meanings of masked and enabled (Haihao) Made non-destructive writes in case enable/disabler rps runs first (Haihao) v3: Reword error message (Damien) Modify postinstall to do the right thing based on previous fixup. (Ben) CC: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by:
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Ben Widawsky authored
v2: Use the correct lock to protect PM interrupt regs, this was accidentally lost from earlier (Haihao) Fix return types (Ben) Reviewed-by:
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Ben Widawsky authored
The motivation here is we're going to add some new interrupt definitions and handling outside of the GT interrupts which is all we've managed so far (with some RPS exceptions). By consolidating the names in the future we can make thing a bit cleaner as we don't need to define register names twice, and we can leverage pretty decent overlap in HW registers since ILK. To explain briefly what is in the comments: there are two sets of interrupt masking/enabling registers. At least so far, the definitions of the two sets overlap. The old code setup distinct names for interrupts in each set, ie. one for global, and one for ring. This made things confusing when using the wrong defines in the wrong places. rebase: Modified VLV bits v2: Renamed GT_RENDER_MASTER to GT_RENDER_CS_MASTER (Damien) Reviewed-by:
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Ben Widawsky authored
It's overkill on older gens, but it's useful for newer gens. Reviewed-by:
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