1. 25 Sep, 2017 40 commits
    • Thomas Gleixner's avatar
      x86/apic: Remove unused callbacks · baab1e84
      Thomas Gleixner authored
      Now that the old allocator is gone, these apic functions are unused. Remove
      them.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213155.524662349@linutronix.de
      baab1e84
    • Thomas Gleixner's avatar
      x86/vector: Use matrix allocator for vector assignment · 69cde000
      Thomas Gleixner authored
      Replace the magic vector allocation code by a simple bitmap matrix
      allocator. This avoids loops and hoops over CPUs and vector arrays, so in
      case of densly used vector spaces it's way faster.
      
      This also gets rid of the magic 'spread the vectors accross priority
      levels' heuristics in the current allocator:
      
      The comment in __asign_irq_vector says:
      
         * NOTE! The local APIC isn't very good at handling
         * multiple interrupts at the same interrupt level.
         * As the interrupt level is determined by taking the
         * vector number and shifting that right by 4, we
         * want to spread these out a bit so that they don't
         * all fall in the same interrupt level.                         
      
      After doing some palaeontological research the following was found the
      following in the PPro Developer Manual Volume 3:
      
           "7.4.2. Valid Interrupts
      
           The local and I/O APICs support 240 distinct vectors in the range of 16
           to 255. Interrupt priority is implied by its vector, according to the
           following relationship: priority = vector / 16
      
           One is the lowest priority and 15 is the highest. Vectors 16 through
           31 are reserved for exclusive use by the processor. The remaining
           vectors are for general use. The processor's local APIC includes an
           in-service entry and a holding entry for each priority level. To avoid
           losing inter- rupts, software should allocate no more than 2 interrupt
           vectors per priority."
      
      The current SDM tells nothing about that, instead it states:
      
           "If more than one interrupt is generated with the same vector number,
            the local APIC can set the bit for the vector both in the IRR and the
            ISR. This means that for the Pentium 4 and Intel Xeon processors, the
            IRR and ISR can queue two interrupts for each interrupt vector: one
            in the IRR and one in the ISR. Any additional interrupts issued for
            the same interrupt vector are collapsed into the single bit in the
            IRR.
      
            For the P6 family and Pentium processors, the IRR and ISR registers
            can queue no more than two interrupts per interrupt vector and will
            reject other interrupts that are received within the same vector."
      
         Which means, that on P6/Pentium the APIC will reject a new message and
         tell the sender to retry, which increases the load on the APIC bus and
         nothing more.
      
      There is no affirmative answer from Intel on that, but it's a sane approach
      to remove that for the following reasons:
      
          1) No other (relevant Open Source) operating systems bothers to
             implement this or mentiones this at all.
      
          2) The current allocator has no enforcement for this and especially the
             legacy interrupts, which are the main source of interrupts on these
             P6 and older systmes, are allocated linearly in the same priority
             level and just work.
      
          3) The current machines have no problem with that at all as verified
             with some experiments.
      
          4) AMD at least confirmed that such an issue is unknown.
      
          5) P6 and older are dinosaurs almost 20 years EOL, so there is really
             no reason to worry about that too much.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213155.443678104@linutronix.de
      69cde000
    • Thomas Gleixner's avatar
      x86/vector: Add tracepoints for vector management · 8d1e3dca
      Thomas Gleixner authored
      Add tracepoints for analysing the new vector management
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213155.357986795@linutronix.de
      8d1e3dca
    • Thomas Gleixner's avatar
      x86/smpboot: Set online before setting up vectors · 8ed4f3e6
      Thomas Gleixner authored
      There is no reason to set the CPU online after establishing the vectors on
      the upcoming CPU. The vector space is protected by the vector lock so no
      changes can happen.
      
      Marking the CPU online before setting up the vector space makes tracing
      work in the early vector management cpu online code.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213155.264311994@linutronix.de
      8ed4f3e6
    • Thomas Gleixner's avatar
      x86/vector: Add vector domain debugfs support · 65d7ed57
      Thomas Gleixner authored
      Add the debug callback for the vector domain, which gives a detailed
      information about vector usage if invoked for the domain by using rhe
      matrix allocator debug function and vector/target information when invoked
      for a particular interrupt.
      
      Extra information foir the Vector domain:
      
      Online bitmaps:       32
      Global available:   6352
      Global reserved:       5
      Total allocated:      20
      System: 41: 0-19,32,50,128,238-255
       | CPU | avl | man | act | vectors
           0   183     4    19  33-48,51-53
           1   199     4     1  33
           2   199     4     0  
      
      Extra information for interrupts:
      
           Vector:    42
           Target:     4
      
      This allows a detailed analysis of the vector usage and the association to
      interrupts and devices.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213155.188137174@linutronix.de
      65d7ed57
    • Thomas Gleixner's avatar
      x86/irq/vector: Initialize matrix allocator · 0fa115da
      Thomas Gleixner authored
      Initialize the matrix allocator and add the proper accounting points to the
      code.
      
      No functional change, just preparation.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213155.108410660@linutronix.de
      0fa115da
    • Thomas Gleixner's avatar
      x86/apic: Add replacement for cpu_mask_to_apicid() · 9f9e3bb1
      Thomas Gleixner authored
      As preparation for replacing the vector allocator, provide a new function
      which takes a cpu number instead of a cpu mask to calculate/lookup the
      resulting APIC destination id.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      9f9e3bb1
    • Thomas Gleixner's avatar
      x86/vector: Move helper functions around · 99a1482d
      Thomas Gleixner authored
      Move the helper functions to a different place as they would end up in the
      middle of management functions.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213154.949581934@linutronix.de
      99a1482d
    • Thomas Gleixner's avatar
      x86/vector: Remove pointless pointer checks · 258d86ee
      Thomas Gleixner authored
      The info pointer checks in assign_irq_vector_policy() are pointless because
      the pointer cannot be NULL, otherwise the calling code would already crash.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213154.859484148@linutronix.de
      258d86ee
    • Thomas Gleixner's avatar
      x86/apic: Get rid of the legacy irq data storage · 4ef76eb6
      Thomas Gleixner authored
      Now that the legacy PIC takeover by the IOAPIC is marked accordingly the
      early boot allocation of APIC data is not longer necessary. Use the regular
      allocation mechansim as it is used by non legacy interrupts and fill in the
      known information (vector and affinity) so the allocator reuses the vector,
      This is important as the timer check might move the timer interrupt 0 back
      to the PIC in case the delivery through the IOAPIC fails.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213154.780521549@linutronix.de
      4ef76eb6
    • Thomas Gleixner's avatar
      x86/ioapic: Mark legacy vectors at reallocation time · 3534be05
      Thomas Gleixner authored
      When the legacy PIC vectors are taken over by the IO APIC the current
      vector assignement code is tricked to reuse the vector by allocating the
      apic data in the early boot process. This can be avoided by marking the
      allocation as legacy PIC take over. Preparatory patch for further cleanups.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213154.700501979@linutronix.de
      3534be05
    • Thomas Gleixner's avatar
      x86/vector: Simplify vector move cleanup · dccfe314
      Thomas Gleixner authored
      The vector move cleanup needs to walk the vector space and do a lot of
      sanity checks to find a vector to cleanup.
      
      With single CPU affinities this can be simplified and made more robust by
      queueing the vector configuration which needs to be cleaned up in a hlist
      on the CPU which was the previous target.
      
      That removes all the race conditions because the cleanup either finds a
      valid list entry or not. The latter happens when the interrupt was torn
      down before the cleanup handler was able to run.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213154.622727892@linutronix.de
      dccfe314
    • Thomas Gleixner's avatar
      x86/vector: Store the single CPU targets in apic data · 029c6e1c
      Thomas Gleixner authored
      Now that the interrupt affinities are targeted at single CPUs storing them
      in a cpumask is overkill. Store them in a dedicated variable.
      
      This does not yet remove the domain cpumasks because the current allocator
      relies on them. Preparatory change for the allocator rework.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213154.544867277@linutronix.de
      029c6e1c
    • Thomas Gleixner's avatar
      x86/vector: Cleanup variable names · 86ba6551
      Thomas Gleixner authored
      The naming convention of variables with the types irq_data and
      apic_chip_data are inconsistent and confusing.
      
      Before reworking the whole vector management make them consistent so
      irq_data pointers are named 'irqd' and apic_chip_data are named 'apicd' all
      over the place.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213154.465731667@linutronix.de
      86ba6551
    • Thomas Gleixner's avatar
      x86/vector: Simplify the CPU hotplug vector update · f0cc6cca
      Thomas Gleixner authored
      With single CPU affinities it's not longer required to scan all interrupts
      for potential destination masks which contain the newly booting CPU.
      
      Reduce it to install the active legacy PIC vectors on the newly booting CPU
      as those cannot be affinity controlled by the kernel and potentially end up
      at any CPU in the system.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213154.388040204@linutronix.de
      f0cc6cca
    • Thomas Gleixner's avatar
      x86/ioapic: Remove obsolete post hotplug update · ef9e56d8
      Thomas Gleixner authored
      With single CPU affinities the post SMP boot vector update is pointless as
      it will just leave the affinities on the same vectors and the same CPUs.
      
      Remove it.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213154.308697243@linutronix.de
      ef9e56d8
    • Thomas Gleixner's avatar
      x86/apic: Get rid of multi CPU affinity · fdba46ff
      Thomas Gleixner authored
      Setting the interrupt affinity of a single interrupt to multiple CPUs has a
      dubious value.
      
       1) This only works on machines where the APIC uses logical destination
          mode. If the APIC uses physical destination mode then it is already
          restricted to a single CPU
      
       2) Experiments have shown, that the benefit of multi CPU affinity is close
          to zero and in some test even worse than setting the affinity to a
          single CPU.
      
          The reason for this is that the delivery targets the APIC with the
          lowest ID first and only if that APIC is busy (servicing an interrupt,
          i.e. ISR is not empty) it hands it over to the next APIC. In the
          conducted tests the vast majority of interrupts ends up on the APIC
          with the lowest ID anyway, so there is no natural spreading of the
          interrupts possible.
      
      Supporting multi CPU affinities adds a lot of complexity to the code, which
      can turn the allocation search into a worst case of
      
          nr_vectors * nr_online_cpus * nr_bits_in_target_mask
      
      As a first step disable it by restricting the vector search to a single
      CPU.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213154.228824430@linutronix.de
      fdba46ff
    • Thomas Gleixner's avatar
      x86/vector: Rename used_vectors to system_vectors · 7854f822
      Thomas Gleixner authored
      used_vectors is a nisnomer as it only has the system vectors which are
      excluded from the regular vector allocation marked. It's not what the name
      suggests storage for the actually used vectors.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213154.150209009@linutronix.de
      7854f822
    • Thomas Gleixner's avatar
      x86/apic: Get rid of apic->target_cpus · c1d1ee9a
      Thomas Gleixner authored
      The target_cpus() callback of the apic struct is not really useful. Some
      APICs return cpu_online_mask and others cpus_all_mask. The latter is bogus
      as it does not take holes in the cpus_possible_mask into account.
      
      Replace it with cpus_online_mask which makes the most sense and remove the
      callback.
      
      The usage sites will be removed in a later step anyway, so get rid of it
      now to have incremental changes.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213154.070850916@linutronix.de
      c1d1ee9a
    • Thomas Gleixner's avatar
      x86/apic/x2apic: Simplify cluster management · 023a6117
      Thomas Gleixner authored
      The cluster management code creates a cluster mask per cpu, which requires
      that on cpu on/offline all cluster masks have to be iterated and
      updated. Other information about the cluster is in different per cpu
      variables.
      
      Create a data structure which holds all information about a cluster and
      fill it in when the first CPU of a cluster comes online. If another CPU of
      a cluster comes online it just finds the pointer to the existing cluster
      structure and reuses it.
      
      That simplifies all usage sites and gets rid of quite some pointless
      iterations over the online cpus to find the cpus which belong to the
      cluster.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213153.992629420@linutronix.de
      023a6117
    • Thomas Gleixner's avatar
      x86/apic: Reorganize struct apic · 72f48a38
      Thomas Gleixner authored
      struct apic has just grown over time by adding function pointers in random
      places. Reorganize it so it becomes more cache line friendly.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213153.913642524@linutronix.de
      72f48a38
    • Thomas Gleixner's avatar
      x86/apic: Move common APIC callbacks · 83a10522
      Thomas Gleixner authored
      Move more apic struct specific functions out of the header and the apic
      management code into the common source file.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213153.834421893@linutronix.de
      83a10522
    • Thomas Gleixner's avatar
      x86/apic: Sanitize 32/64bit APIC callbacks · 64063505
      Thomas Gleixner authored
      The 32bit and the 64bit implementation of default_cpu_present_to_apicid()
      and default_check_phys_apicid_present() are exactly the same, but
      implemented and located differently.
      
      Move them to common apic code and get rid of the pointless difference.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213153.757329991@linutronix.de
      64063505
    • Thomas Gleixner's avatar
      x86/apic: Move APIC noop specific functions · 1da91779
      Thomas Gleixner authored
      Move more inlines to the place where they belong.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213153.677743545@linutronix.de
      1da91779
    • Thomas Gleixner's avatar
      x86/apic: Move probe32 specific APIC functions · 0801bbaa
      Thomas Gleixner authored
      The apic functions which are used in probe_32.c are implemented as inlines
      or in apic.c. There is no reason to have them at random places.
      
      Move them to the actual usage site and make them static.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213153.596768194@linutronix.de
      0801bbaa
    • Thomas Gleixner's avatar
      x86/apic: Sanitize return value of check_apicid_used() · 57e0aa44
      Thomas Gleixner authored
      The check is boolean, but the function returns unsigned long for no value.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213153.516730518@linutronix.de
      57e0aa44
    • Thomas Gleixner's avatar
      x86/apic: Sanitize return value of apic.set_apic_id() · 727657e6
      Thomas Gleixner authored
      The set_apic_id() callback returns an unsigned long value which is handed
      in to apic_write() as the value argument u32.
      
      Adjust the return value so it returns u32 right away.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213153.437208268@linutronix.de
      727657e6
    • Thomas Gleixner's avatar
      x86/apic: Deinline x2apic functions · 981c2eac
      Thomas Gleixner authored
      These inline functions are used in both the cluster and the physical x2apic
      code to fill in the function pointers of the apic structure. That means the
      code is generated twice for no reason.
      
      Move it to a C code and reuse it.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213153.358954066@linutronix.de
      981c2eac
    • Thomas Gleixner's avatar
      Merge branch 'irq/core' into x86/apic · e4ae4c8e
      Thomas Gleixner authored
      Pick up the dependencies for the vector management rework series.
      e4ae4c8e
    • Thomas Gleixner's avatar
      genirq/matrix: Add tracepoints · ec0f7cd2
      Thomas Gleixner authored
      Add tracepoints for the irq bitmap matrix allocator.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213153.279468022@linutronix.de
      ec0f7cd2
    • Thomas Gleixner's avatar
      genirq: Implement bitmap matrix allocator · 2f75d9e1
      Thomas Gleixner authored
      Implement the infrastructure for a simple bitmap based allocator, which
      will replace the x86 vector allocator. It's in the core code as other
      architectures might be able to reuse/extend it. For now it only implements
      allocations for single CPUs, but it's simple to add multi CPU allocation
      support if required.
      
      The concept is rather simple:
      
       Global information:
       	system_vector bitmap
      	global accounting
      
       PerCPU information:
       	allocation bitmap
      	managed allocation bitmap
      	local accounting
      
      The system vector bitmap is used to exclude vectors system wide from the
      allocation space.
      
      The allocation bitmap is used to keep track of per cpu used vectors.
      
      The managed allocation bitmap is used to reserve vectors for managed
      interrupts.
      
      When a regular (non managed) interrupt allocation happens then the
      following rule applies:
      
            tmpmap = system_map | alloc_map | managed_map
            find_zero_bit(tmpmap)
      
      Oring the bitmaps together gives the real available space. The same rule
      applies for reserving a managed interrupt vector. But contrary to the
      regular interrupts the reservation only marks the bit in the managed map
      and therefor excludes it from the regular allocations. The managed map is
      only cleaned out when the a managed interrupt is completely released and it
      stays alive accross CPU offline/online operations.
      
      For managed interrupt allocations the rule is:
      
            tmpmap = managed_map & ~alloc_map
            find_first_bit(tmpmap)
      
      This returns the first bit which is in the managed map, but not yet
      allocated in the allocation map. The allocation marks it in the allocation
      map and hands it back to the caller for use.
      
      The rest of the code are helper functions to handle the various
      requirements and the accounting which are necessary to replace the x86
      vector allocation code. The result is a single patch as the evolution of
      this infrastructure cannot be represented in bits and pieces.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Chris Metcalf <cmetcalf@mellanox.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213153.185437174@linutronix.de
      2f75d9e1
    • Thomas Gleixner's avatar
      genirq/irqdomain: Add force reactivation flag to irq domains · 22d0b12f
      Thomas Gleixner authored
      Allow irqdomains to tell the core code, that after early activation the
      interrupt needs to be reactivated at request_irq() time.
      
      This allows reservation of vectors at early activation time and actual
      vector assignment at request_irq() time.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213153.106242536@linutronix.de
      22d0b12f
    • Thomas Gleixner's avatar
      genirq/irqdomain: Propagate early activation · 42e1cc2d
      Thomas Gleixner authored
      Propagate the early activation mode to the irqdomain activate()
      callbacks. This is required for the upcoming reservation, late vector
      assignment scheme, so that the early activation call can act accordingly.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213153.028353660@linutronix.de
      42e1cc2d
    • Thomas Gleixner's avatar
      genirq/irqdomain: Allow irq_domain_activate_irq() to fail · bb9b428a
      Thomas Gleixner authored
      Allow irq_domain_activate_irq() to fail. This is required to support a
      reservation and late vector assignment scheme.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213152.933882227@linutronix.de
      bb9b428a
    • Thomas Gleixner's avatar
      genirq/irqdomain: Update irq_domain_ops.activate() signature · 72491643
      Thomas Gleixner authored
      The irq_domain_ops.activate() callback has no return value and no way to
      tell the function that the activation is early.
      
      The upcoming changes to support a reservation scheme which allows to assign
      interrupt vectors on x86 only when the interrupt is actually requested
      requires:
      
        - A return value, so activation can fail at request_irq() time
        
        - Information that the activate invocation is early, i.e. before
          request_irq().
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213152.848490816@linutronix.de
      72491643
    • Thomas Gleixner's avatar
      genirq: Separate activation and startup · c942cee4
      Thomas Gleixner authored
      Activation of an interrupt and startup are currently a combo
      functionlity. That works so far, but upcoming changes require a strict
      separation because the activation can fail in future.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213152.754334077@linutronix.de
      c942cee4
    • Thomas Gleixner's avatar
      genirq: Set managed shut down flag at init · 239306fe
      Thomas Gleixner authored
      Managed interrupts should start up in managed shutdown mode. Set the status
      flag when initialising the irq descriptor.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213152.669687742@linutronix.de
      239306fe
    • Thomas Gleixner's avatar
      genirq: Make state consistent for !IRQ_DOMAIN_HIERARCHY · 457f6d35
      Thomas Gleixner authored
      In the !IRQ_DOMAIN_HIERARCHY cas the activation stubs are not
      setting/clearing the activation status bits. This is not a problem at the
      moment, but upcoming changes require a correct status.
      
      Add the set/clear incovations to the stub functions and move them to the
      core internal header to avoid duplication and visibility outside the core.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213152.591985591@linutronix.de
      457f6d35
    • Thomas Gleixner's avatar
      irqdomain/debugfs: Provide domain specific debug callback · c3e7239a
      Thomas Gleixner authored
      Some interrupt domains like the X86 vector domain has special requirements
      for debugging, like showing the vector usage on the CPUs.
      
      Add a callback to the irqdomain ops which can be filled in by domains which
      require it and add conditional invocations to the irqdomain and the per irq
      debug files.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213152.512937505@linutronix.de
      c3e7239a
    • Thomas Gleixner's avatar
      genirq/msi: Capture device name for debugfs · 07557ccb
      Thomas Gleixner authored
      For debugging the allocation of unused or potentially leaked interrupt
      descriptor it's helpful to have some information about the site which
      allocated them. In case of MSI this is simple because the caller hands the
      device struct pointer into the domain allocation function.
      
      Duplicate the device name and show it in the debugfs entry of the interrupt
      descriptor.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarJuergen Gross <jgross@suse.com>
      Tested-by: default avatarYu Chen <yu.c.chen@intel.com>
      Acked-by: default avatarJuergen Gross <jgross@suse.com>
      Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Alok Kataria <akataria@vmware.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: Rui Zhang <rui.zhang@intel.com>
      Cc: "K. Y. Srinivasan" <kys@microsoft.com>
      Cc: Arjan van de Ven <arjan@linux.intel.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Link: https://lkml.kernel.org/r/20170913213152.433038426@linutronix.de
      07557ccb