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  1. 01 Feb, 2016 1 commit
  3. 27 Jan, 2016 3 commits
    • Mark Brown's avatar
      regmap: mmio: Convert to regmap_bus and fix accessor usage · 922a9f93
      Mark Brown authored 
      Currently regmap-mmio uses the __raw accessors to read and write from
memory.  This is not safe as these interact poorly with spinlocks and
are not guaranteed to generate emulated instructions on at least ARM
where regmap is commonly used.  The APIs that are provided all provide
some byte swapping so this is difficult to do with the current
regmap-mmio implementation which attempts to use the regmap core byte
swapping.

We can fix this by modernising the MMIO implementation to use
reg_read() and reg_write() operations which were added after the API was
implemented and pass simple unsigned integers through to the bus, making
use of the formatting provided by the I/O accessors using a similar
pattern to that used by the core.  This will be less efficient for block
I/O operations since we now enable and disable any required clocks per
register but it is not clear that any users of regmap-mmio actually use
block I/O and there is room to optimise later.

This removes support for big endian I/O on 64 bit registers since no I/O
accessors are provided, no current users were found and support can be
added easily once they are available.

In addition make the default endianness little endian.  This was the
behaviour prior to 29bb45f2 (regmap-mmio: Use native endianness
for read/write) and is the behaviour desired by most existing users, the
users have been audited and those that need native endianness converted
to request it explicitly.  Previously native was documented as the
default but due to the byte swapping in the accessors this was not
correctly implemented.

Fixes: 29bb45f2 (regmap-mmio: Use native endianness for read/write)
Reported-by: default avatarJohannes Berg <johannes@sipsolutions.net>
Tested-by: default avatarJohannes Berg <johannes@sipsolutions.net>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
      922a9f93
    • Mark Brown's avatar
      MIPS: dt: Explicitly specify native endian behaviour for syscon · 25d6463e
      Mark Brown authored 
      On many MIPS systems the endianness of IP blocks is kept the same as
that of the CPU by the hardware.  This includes the system controllers
on these systems which are controlled via syscon which uses the regmap
API which used readl() and writel() to interact with the hardware,
meaning that all writes are converted to little endian when writing to
the hardware.  This caused a bad interaction with the regmap core in big
endian mode since it was not aware of the byte swapping and so ended up
performing little endian writes.

Unfortunately when this issue was noticed it was addressed by updating
the DT for the affected devices to specify them as little endian.  This
happened to work since it resulted in two endianness swaps which
cancelled each other out and gave little endian behaviour but meant that
the DT was clearly not accurately describing the hardware.

The intention of commit 29bb45f2 (regmap-mmio: Use native
endianness for read/write) was to fix this by making regmap default to
native endianness but this breaks most other MMIO users where the
hardware has a fixed endianness and the implementation uses the __raw
accessors which are not intended to be used outside of architecture
code.  Instead use the newly added native-endian DT property to say
exactly what we want for these systems.

Fixes: 29bb45f2 (regmap-mmio: Use native endianness for read/write)
Reported-by: default avatarJohannes Berg <johannes@sipsolutions.net>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Acked-by: default avatarRalf Baechle <ralf@linux-mips.org>
      25d6463e
    • Mark Brown's avatar
      regmap: Add explict native endian flag to DT bindings · a06c488d
      Mark Brown authored 
      Currently the binding document says that if no endianness is configured
we use native endian but this is not in fact true for all binding types
and we do have some devices that really want native endianness such as
Broadcom MIPS SoCs where switching the endianness of the CPU also
switches the endianness of external IPs.

Provide an explicit option for this.
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
      a06c488d
  5. 24 Jan, 2016 36 commits
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