1. 08 May, 2019 4 commits
  2. 07 May, 2019 4 commits
  3. 06 May, 2019 5 commits
    • Olivier Moysan's avatar
      ASoC: stm32: spdifrx: change trace level on iec control · 19e42536
      Olivier Moysan authored
      Change trace level to debug to avoid spurious messages.
      Return quietly when accessing iec958 control, while no
      S/PDIF signal is available.
      Signed-off-by: default avatarOlivier Moysan <olivier.moysan@st.com>
      Signed-off-by: default avatarMark Brown <broonie@kernel.org>
      19e42536
    • Olivier Moysan's avatar
      ASoC: stm32: spdifrx: update pcm hardware constraints · 863137f0
      Olivier Moysan authored
      - Set period minimum size. Ensure at least 5ms period
      up to 48kHz/16 bits to prevent underrun/overrun.
      - Remove MDMA constraints on period maximum size and
      set period maximum to half the buffer maximum size.
      Signed-off-by: default avatarOlivier Moysan <olivier.moysan@st.com>
      Signed-off-by: default avatarMark Brown <broonie@kernel.org>
      863137f0
    • Jon Hunter's avatar
      ASoC: max98090: Fix restore of DAPM Muxes · ecb2795c
      Jon Hunter authored
      The max98090 driver defines 3 DAPM muxes; one for the right line output
      (LINMOD Mux), one for the left headphone mixer source (MIXHPLSEL Mux)
      and one for the right headphone mixer source (MIXHPRSEL Mux). The same
      bit is used for the mux as well as the DAPM enable, and although the mux
      can be correctly configured, after playback has completed, the mux will
      be reset during the disable phase. This is preventing the state of these
      muxes from being saved and restored correctly on system reboot. Fix this
      by marking these muxes as SND_SOC_NOPM.
      
      Note this has been verified this on the Tegra124 Nyan Big which features
      the MAX98090 codec.
      Signed-off-by: default avatarJon Hunter <jonathanh@nvidia.com>
      Signed-off-by: default avatarMark Brown <broonie@kernel.org>
      Cc: stable@vger.kernel.org
      ecb2795c
    • Curtis Malainey's avatar
      ASoC: RT5677-SPI: Disable 16Bit SPI Transfers · a46eb523
      Curtis Malainey authored
      The current algorithm allows 3 types of transfers, 16bit, 32bit and
      burst. According to Realtek, 16bit transfers have a special restriction
      in that it is restricted to the memory region of
      0x18020000 ~ 0x18021000. This region is the memory location of the I2C
      registers. The current algorithm does not uphold this restriction and
      therefore fails to complete writes.
      
      Since this has been broken for some time it likely no one is using it.
      Better to simply disable the 16 bit writes. This will allow users to
      properly load firmware over SPI without data corruption.
      Signed-off-by: default avatarCurtis Malainey <cujomalainey@chromium.org>
      Reviewed-by: default avatarBen Zhang <benzh@chromium.org>
      Signed-off-by: default avatarMark Brown <broonie@kernel.org>
      Cc: stable@vger.kernel.org
      a46eb523
    • Baolin Wang's avatar
      ASoC: sprd: Add reserved DMA memory support · 1587a061
      Baolin Wang authored
      For Spreadtrum audio platform driver, it need allocate a larger DMA buffer
      dynamically to copy audio data between userspace and kernel space, but that
      will increase the risk of memory allocation failure especially the system
      is under heavy load situation.
      
      To make sure the audio can work in this scenario, we usually reserve one
      region of memory to be used as a shared pool of DMA buffers for the
      platform component. So add of_reserved_mem_device_init_by_idx() function
      to initialize the shared pool of DMA buffers to be used by the platform
      component.
      Signed-off-by: default avatarBaolin Wang <baolin.wang@linaro.org>
      Signed-off-by: default avatarMark Brown <broonie@kernel.org>
      1587a061
  4. 03 May, 2019 26 commits
  5. 02 May, 2019 1 commit
    • Adam Thomson's avatar
      ASoC: da7219: Use clk_round_rate to handle enabled bclk/wclk case · 1cd472d2
      Adam Thomson authored
      For some platforms where DA7219 is the DAI clock master, BCLK/WCLK
      will be set and enabled prior to the codec's hw_params() function
      being called. It is possible the platform requires a different
      BCLK configuration than would be chosen by hw_params(), for
      example S16_LE format needed with a 64-bit frame to satisfy certain
      devices using the clocks.
      
      To handle those kinds of scenarios, the use of clk_round_rate() is
      now employed as part of hw_params(). If BCLK is already enabled
      then this function will just return the currently set rate, if it
      is valid for the desired frame size, so the subsequent call to
      clk_set_rate() will succeed and nothing changes with regards to
      clocking. In addition the specific BCLK & WCLK recalc_rate()
      implementations needed updating to always give back a real value,
      as those functions are called as part of the clk init code and a
      real value is needed for the clk_round_rate() call to work as
      expected.
      Signed-off-by: default avatarAdam Thomson <Adam.Thomson.Opensource@diasemi.com>
      Signed-off-by: default avatarMark Brown <broonie@kernel.org>
      1cd472d2