1. 25 Apr, 2017 4 commits
    • Stephane Grosjean's avatar
      can: peak: move header file to new can common subdir · c3df7c57
      Stephane Grosjean authored
      The CAN-FD IP from PEAK-System runs into several kinds of PC CAN-FD
      interfaces. Up to now, only the USB CAN-FD adapters were supported by
      the Kernel. In order to prepare the adding of some new non-USB CAN-FD
      interfaces, this patch moves - and rename - the IP definitions file
      from its private (usb) sub-directory into a - newly created - CAN specific
      one.
      Signed-off-by: default avatarStephane Grosjean <s.grosjean@peak-system.com>
      Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
      c3df7c57
    • Stephane Grosjean's avatar
      can: peak: fix usage of const qualifier in pointers args · 113ab88b
      Stephane Grosjean authored
      Fixes the usage of the const qualifier in the memory pointer arguments
      of the declared inline functions. By changing the line containing "const",
      this patch also changes the name of the arg into a more usual one.
      Signed-off-by: default avatarStephane Grosjean <s.grosjean@peak-system.com>
      Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
      113ab88b
    • Stephane Grosjean's avatar
      can: peak: fix usage of usb specific data type · 81c5e13d
      Stephane Grosjean authored
      This patch fixes the wrong usage of a specific USB data type into a common
      header file. This common header file is intended to define the common data
      types and values that define access to the PEAK-System CAN-FD IP, whatever
      the PC interface is.
      Signed-off-by: default avatarStephane Grosjean <s.grosjean@peak-system.com>
      Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
      81c5e13d
    • David S. Miller's avatar
      sparc64: Improve 64-bit constant loading in eBPF JIT. · 14933dc8
      David S. Miller authored
      Doing a full 64-bit decomposition is really stupid especially for
      simple values like 0 and -1.
      
      But if we are going to optimize this, go all the way and try for all 2
      and 3 instruction sequences not requiring a temporary register as
      well.
      
      First we do the easy cases where it's a zero or sign extended 32-bit
      number (sethi+or, sethi+xor, respectively).
      
      Then we try to find a range of set bits we can load simply then shift
      up into place, in various ways.
      
      Then we try negating the constant and see if we can do a simple
      sequence using that with a xor at the end.  (f.e. the range of set
      bits can't be loaded simply, but for the negated value it can)
      
      The final optimized strategy involves 4 instructions sequences not
      needing a temporary register.
      
      Otherwise we sadly fully decompose using a temp..
      
      Example, from ALU64_XOR_K: 0x0000ffffffff0000 ^ 0x0 = 0x0000ffffffff0000:
      
      0000000000000000 <foo>:
         0:   9d e3 bf 50     save  %sp, -176, %sp
         4:   01 00 00 00     nop
         8:   90 10 00 18     mov  %i0, %o0
         c:   13 3f ff ff     sethi  %hi(0xfffffc00), %o1
        10:   92 12 63 ff     or  %o1, 0x3ff, %o1     ! ffffffff <foo+0xffffffff>
        14:   93 2a 70 10     sllx  %o1, 0x10, %o1
        18:   15 3f ff ff     sethi  %hi(0xfffffc00), %o2
        1c:   94 12 a3 ff     or  %o2, 0x3ff, %o2     ! ffffffff <foo+0xffffffff>
        20:   95 2a b0 10     sllx  %o2, 0x10, %o2
        24:   92 1a 60 00     xor  %o1, 0, %o1
        28:   12 e2 40 8a     cxbe  %o1, %o2, 38 <foo+0x38>
        2c:   9a 10 20 02     mov  2, %o5
        30:   10 60 00 03     b,pn   %xcc, 3c <foo+0x3c>
        34:   01 00 00 00     nop
        38:   9a 10 20 01     mov  1, %o5     ! 1 <foo+0x1>
        3c:   81 c7 e0 08     ret
        40:   91 eb 40 00     restore  %o5, %g0, %o0
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      14933dc8
  2. 24 Apr, 2017 36 commits