1. 31 Oct, 2013 9 commits
  2. 15 Oct, 2013 2 commits
    • Dave Airlie's avatar
      drm/i915: abstract the conversion of device->minor out to a macro · 14c8d110
      Dave Airlie authored
      This will make the next patch to change how this works a lot cleaner.
      Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
      14c8d110
    • Dave Airlie's avatar
      Merge branch 'drm-intel-next' of git://people.freedesktop.org/~danvet/drm-intel into drm-next · 5259c522
      Dave Airlie authored
      New feature pile for 3.12! Highlights:
      - Stereo/3d support for hdmi from Damien, both the drm core bits and
        the i915 integration.
      - Manual boost/deboost logic for gpu turbo (Chris)
      - Fixed up clock readout support for vlv (Chris).
      - Tons of little fixes and improvements for vlv in general (Chon Minng
        Lee and Jesse Barnes).
      - Power well support for the legacy vga plane (Ville).
      - DP impromevents from Jani.
      - Improvements to the Haswell modeset sequence (Ville+Paulo).
      - Haswell DDI improvements, using the VBT for some tuning values and
        to check the configuration (Paulo).
      - Tons of other small improvements and fixups.
      
      * 'drm-intel-next' of git://people.freedesktop.org/~danvet/drm-intel: (92 commits)
        drm/i915: Use adjusted_mode in the fastboot hack to disable pfit
        drm/i915: Add a more detailed comment about the set_base() fastboot hack
        drm/i915/vlv: Turn off power gate for BIOS-less system.
        drm/i915/vlv: reset DPIO on load and resume v2
        drm/i915: Simplify PSR debugfs
        drm/i915: Tweak RPS thresholds to more aggressively downclock
        drm/i915: Boost RPS frequency for CPU stalls
        drm/i915: Fix __wait_seqno to use true infinite timeouts
        drm/i915: Add some missing steps to i915_driver_load error path
        drm/i915: Clean up the ring scaling calculations
        drm/i915: Don't populate pipe_src_{w,h} multiple times
        drm/i915: implement the Haswell mode set sequence workaround
        drm/i915: Disable/enable planes as the first/last thing during modeset on HSW
        i915/vlv: untangle integrated clock source handling v4
        drm/i915: fix typo s/PatherPoint/PantherPoint/
        drm/i915: Make intel_resume_power_well() static
        drm/i915: destroy connector sysfs files earlier
        drm/i915/dp: do not write DP_TRAINING_PATTERN_SET all the time
        drm/i915/dp: retry i2c-over-aux seven times on AUX DEFER
        drm/i915/vlv: reduce GT FIFO error info to a debug message
        ...
      5259c522
  3. 10 Oct, 2013 1 commit
  4. 09 Oct, 2013 22 commits
  5. 04 Oct, 2013 4 commits
  6. 03 Oct, 2013 2 commits
    • Rodrigo Vivi's avatar
      drm/i915: Simplify PSR debugfs · a031d709
      Rodrigo Vivi authored
      for igt test case.
      
      v2: remove trailing spaces and fix conflicts
      Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@gmail.com>
      [danvet:
      - make it comipile
      - s/IS_HASWELL/HAS_PSR/]
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      a031d709
    • Chris Wilson's avatar
      drm/i915: Tweak RPS thresholds to more aggressively downclock · dd75fdc8
      Chris Wilson authored
      After applying wait-boost we often find ourselves stuck at higher clocks
      than required. The current threshold value requires the GPU to be
      continuously and completely idle for 313ms before it is dropped by one
      bin. Conversely, we require the GPU to be busy for an average of 90% over
      a 84ms period before we upclock. So the current thresholds almost never
      downclock the GPU, and respond very slowly to sudden demands for more
      power. It is easy to observe that we currently lock into the wrong bin
      and both underperform in benchmarks and consume more power than optimal
      (just by repeating the task and measuring the different results).
      
      An alternative approach, as discussed in the bspec, is to use a
      continuous threshold for upclocking, and an average value for downclocking.
      This is good for quickly detecting and reacting to state changes within a
      frame, however it fails with the common throttling method of waiting
      upon the outstanding frame - at least it is difficult to choose a
      threshold that works well at 15,000fps and at 60fps. So continue to use
      average busy/idle loads to determine frequency change.
      
      v2: Use 3 power zones to keep frequencies low in steady-state mostly
      idle (e.g. scrolling, interactive 2D drawing), and frequencies high
      for demanding games. In between those end-states, we use a
      fast-reclocking algorithm to converge more quickly on the desired bin.
      
      v3: Bug fixes - make sure we reset adj after switching power zones.
      
      v4: Tune - drop the continuous busy thresholds as it prevents us from
      choosing the right frequency for glxgears style swap benchmarks. Instead
      the goal is to be able to find the right clocks irrespective of the
      wait-boost.
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Kenneth Graunke <kenneth@whitecape.org>
      Cc: Stéphane Marchesin <stephane.marchesin@gmail.com>
      Cc: Owen Taylor <otaylor@redhat.com>
      Cc: "Meng, Mengmeng" <mengmeng.meng@intel.com>
      Cc: "Zhuang, Lena" <lena.zhuang@intel.com>
      Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      dd75fdc8