1. 10 Feb, 2012 4 commits
    • Daniel Vetter's avatar
      drm/i915: fixup interlaced vertical timings confusion, part 1 · ca9bfa7e
      Daniel Vetter authored
      We have a pretty decent confusion about vertical timings of interlaced
      modes. Peter Ross has written a patch that makes interlace modes work
      on a lot more platforms/output combinations by doubling the vertical
      timings.
      
      The issue with that patch is that core drm _does_ support specifying
      whether we want these vertical timings in fields or frames, we just
      haven't managed to consistently use this facility. The relavant
      function is drm_mode_set_crtcinfo, which fills in the crtc timing
      information.
      
      The first thing to note is that the drm core keeps interlaced modes in
      frames, but displays modelines in fields. So when the crtc modeset
      helper copies over the mode into adjusted_mode it will already contain
      vertical timings in half-frames. The result is that the fixup code in
      intel_crtc_mode_fixup doesn't actually do anything (in most cases at
      least).
      
      Now gen3+ natively supports interlaced modes and wants the vertical
      timings in frames. Which is what sdvo already fixes up, at least under
      some conditions.
      
      There are a few other place that demand vertical timings in fields
      but never actually deal with interlaced modes, so use frame timings
      for consistency, too. These are:
      - lvds panel,
      - dvo encoders - dvo is the only way gen2 could support interlaced
        mode, but currently we don't support any encoders that do.
      - tv out - despite that the tv dac sends out an interlaced signal it
        expects a progressive mode pipe configuration.
      All these encoders enforce progressive modes by resetting
      interlace_allowed.
      
      Hence we always want crtc vertical timings in frames. Enforce this in
      our crtc mode_fixup function and rip out any redudant timing
      computations from the encoders' mode_fixup function.
      
      v2-4: Adjust the vertical timings a bit.
      
      v5: Split out the 'subtract-one for interlaced' fixes.
      
      v6: Clarify issues around tv-out and gen2.
      Reviewed-by: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
      Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
      Tested-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
      Tested-by: default avatarChristopher Egert <cme3000@gmail.com>
      Tested-by: default avatarAlfonso Fiore <alfonso.fiore@gmail.com>
      Signed-Off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      ca9bfa7e
    • Daniel Vetter's avatar
      drm/i915: clean up interlaced pipeconf bit definitions · d442ae18
      Daniel Vetter authored
      - Clarify which bits are for which chips.
      - Note that gen2 can't do interlaced directly (only via dvo tv chips).
      - Move the mask to the top to make it clearer how wide this field is.
      - Add defintions for all possible values.
      
      This patch doesn't change any code.
      
      v2: Paulo Zanoni pointed out that the pixel doubling modes do no
      longer exist on ivb.
      
      Cc: Peter Ross <pross@xvid.org>
      Reviewed-by: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
      Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
      Tested-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
      Tested-by: default avatarChristopher Egert <cme3000@gmail.com>
      Tested-by: default avatarAlfonso Fiore <alfonso.fiore@gmail.com>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      d442ae18
    • Daniel Vetter's avatar
      Merge remote-tracking branch 'airlied/drm-fixes' into drm-intel-next-queued · 9edd576d
      Daniel Vetter authored
      Back-merge from drm-fixes into drm-intel-next to sort out two things:
      
      - interlaced support: -fixes contains a bugfix to correctly clear
        interlaced configuration bits in case the bios sets up an interlaced
        mode and we want to set up the progressive mode (current kernels
        don't support interlaced). The actual feature work to support
        interlaced depends upon (and conflicts with) this bugfix.
      
      - forcewake voodoo to workaround missed IRQ issues: -fixes only enabled
        this for ivybridge, but some recent bug reports indicate that we
        need this on Sandybridge, too. But in a slightly different flavour
        and with other fixes and reworks on top. Additionally there are some
        forcewake cleanup patches heading to -next that would conflict with
        currrent -fixes.
      Signed-Off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      9edd576d
    • Dave Airlie's avatar
      Merge branch 'drm-intel-fixes' of... · 28a4d567
      Dave Airlie authored
      Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux into drm-fixes
      
      * 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux:
        drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT (v2)
        drm/i915: no lvds quirk for AOpen MP45
        drm/i915: Force explicit bpp selection for intel_dp_link_required
        drm/i915: fixup interlaced bits clearing in PIPECONF on PCH_SPLIT
        drm/i915:: Disable FBC on SandyBridge
      28a4d567
  2. 09 Feb, 2012 9 commits
  3. 08 Feb, 2012 5 commits
  4. 06 Feb, 2012 1 commit
  5. 03 Feb, 2012 2 commits
  6. 02 Feb, 2012 19 commits