- 08 Dec, 2010 7 commits
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Ben Skeggs authored
Signed-off-by:Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
The regs belong to PFIFO, they're different for pretty much the same generations we need different PFIFO control for, and NVC0 is going to be even more different than the rest. Signed-off-by: -
Francisco Jerez authored
Sleeping doesn't pay off for very short delays in comparison with the minimum granularity of schedule_timeout(). Signed-off-by:
Francisco Jerez <currojerez@riseup.net> Signed-off-by:
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Francisco Jerez authored
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Francisco Jerez authored
There have been reports of PFIFO cache errors during context take down (fdo bug 31637). They are caused by some GPU objects being taken out while the channel is still potentially processing commands. Make sure that all the previous rendering has landed before releasing a GPU object. Reported-by:
Grzesiek Sójka <pld@pfu.pl> Reported-by:
Patrice Mandin <patmandin@gmail.com> Signed-off-by:
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Francisco Jerez authored
nvxx_graph_isr is already taking care of it. In some cases this could've made you miss PGRAPH interrupts (e.g. when you were supposed to get several IRQs of the same kind in a row). Signed-off-by:
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Francisco Jerez authored
No functional changes, just simplify some code paths a bit. Signed-off-by:
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- 03 Dec, 2010 33 commits
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Francisco Jerez authored
In typical Apple fashion there's no standard information about what encoders are present on this machine, this patch adds a quirk to provide it. Signed-off-by:
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Ben Skeggs authored
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Ben Skeggs authored
These have been unused since UMS support was ripped out, so lets remove them completely. Signed-off-by: -
Ben Skeggs authored
Fix running of destroy_context() when create_context() has never been called for the channel, and fill in engine's tlb_flush() function pointer. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
Allows callers to install their own handlers for when a GPIO line changes state (such as for hotplug detect). This also fixes a bug where we weren't acknowledging the GPIO IRQ until after the bottom half had run, causing a severe IRQ storm in some cases. Reviewed-by:
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Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
Lets start to clean up this mess! Reviewed-by:
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Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Francisco Jerez authored
Reported-by:
Pekka Paalanen <pq@iki.fi> Signed-off-by:
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Francisco Jerez authored
Signed-off-by:
Xavier Chantry <chantry.xavier@gmail.com> Signed-off-by:
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Francisco Jerez authored
The point is to share more code between the PFB/PGRAPH tile region hooks, and give the hardware specific functions a chance to allocate per-region resources. Signed-off-by:
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Francisco Jerez authored
nouveau_bo_move_m2mf() needs to lock the kernel channel, and it may be called from the pushbuf IOCTL with an user channel already locked. Use a separate subclass for the kernel channel mutex because this is legitimate mutex nesting. Signed-off-by:
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Francisco Jerez authored
In a multihead setup vblank interrupts may end up enabled in both heads. In that case we want to ignore the vblank interrupts coming from the wrong CRTC to avoid tearing and unbalanced calls to drm_vblank_get/put (fdo bug 31074). Reported-by:
Felix Leimbach <felix.leimbach@gmx.net> Signed-off-by:
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Francisco Jerez authored
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Francisco Jerez authored
nv0x-nv4x should be mostly fine, nv50 doesn't work yet. Signed-off-by:
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Francisco Jerez authored
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Francisco Jerez authored
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Marcin Slusarz authored
nouveau_fence_* functions are not type safe, which could lead to bugs. Additionally every use of nouveau_fence_unref had to cast struct nouveau_fence to void **. Fix it by renaming old functions and creating static inline functions with new prototypes. We still need old functions, because we pass function pointers to ttm. As we are wrapping functions, drop unused "void *arg" parameter where possible. Signed-off-by:
Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by:
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Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Only supported on NV50+ so far, and disabled by default currently. The module parameter "msi=1" will enable it. There's a kernel bug which will cause this to fail if the module (or the NVIDIA binary driver) has ever been loaded before loading nouveau with MSI enabled. As such, this is only safe to enable if you have nouveau load on boot, and don't wish to ever reload it. The workaround is to "echo 0 > /sys/bus/pci/devices/<device>/enable" until the enable count reads 0. Then you should be able to load nouveau with MSI enabled. Signed-off-by:
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