- 04 Jun, 2015 40 commits
-
-
monk.liu authored
bo_va may un-initialized, fix it. Signed-off-by:
monk.liu <monk.liu@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Jammy Zhou <jammy.zhou@amd.com>
-
monk.liu authored
Need to take the lock when accessing this. Signed-off-by:
-
monk.liu authored
call reservation_object_reserve_shared before amdgpu_bo_fence Signed-off-by:
-
Chunming Zhou authored
Pass a ttm_placement pointer to amdgpu_bo_create_restricted add min_offset to amdgpu_bo_pin_restricted. This makes it easier to allocate memory with address restrictions. With this patch we can also enable 2-ended allocation again. v2: fix rebase conflicts v3: memset placements before using Reviewed-by:
Chunming Zhou <david1.zhou@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com>
-
yanyang1 authored
The structure is renamed and moved to amd_shared.h to make the component independent. This makes it easier to add new components in the future. v2: fix include path Reviewed-by:
yanyang1 <young.yang@amd.com> Signed-off-by:
-
Christian König authored
Not needed any more. Signed-off-by:
-
Christian König authored
It's causing issues with VMID handling and comparing the fence value two times actually doesn't make handling faster. Port of radeon commit "d6d5c5b8". Signed-off-by:
-
Christian König authored
Signed-off-by:
-
Sonny Jiang authored
Enable UVD dpm (dynamic power management) and powergating. UVD dpm dynamically scales the UVD clocks on demand. Powergating turns off the power to the block when it's not in use. Signed-off-by:
Sonny Jiang <sonny.jiang@amd.com> Acked-by:
-
Leo Liu authored
VCE 3.0 has two indentical instances in the engine, they share the same registers name in differrent memory block distinguished by the grbm_gfx_index, we set to master instance after init, it will dispatch task to slave instance. These two instances will share the same firmware, but have their own stacks and heaps. v2: add mutex for using grbm_gfx_index Signed-off-by:
Leo Liu <leo.liu@amd.com> Reviewed-by:
-
Leo Liu authored
Firmware required BO size changes in terms of ASIC family Signed-off-by:
-
Alex Deucher authored
Port of 77cb2fea to amdgpu. Reviewed-by:
-
Marek Olšák authored
Signed-off-by:
Marek Olšák <marek.olsak@amd.com> Reviewed-by:
-
Marek Olšák authored
Signed-off-by:
-
Christian König authored
Signed-off-by:
-
Christian König authored
Signed-off-by:
-
Christian König authored
Deny user and kernel mapping if we said we never want to do so. Signed-off-by:
-
Christian König authored
Signed-off-by:
-
Alex Deucher authored
Retry the dpcd fetch several times. Some eDP panels fail several times before the fetch is successful. bug: https://bugs.freedesktop.org/show_bug.cgi?id=73530 Ported from radeon. Reviewed-by:
-
Alex Deucher authored
Use %*ph rather than walking the array. Reviewed-by:
-
Alex Deucher authored
Ported from similar radeon patch. Reviewed-by:
-
Alex Deucher authored
Since we may modify display state. Reviewed-by:
-
Marek Olšák authored
Signed-off-by:
-
Alex Deucher authored
Reviewed-by:
-
Alex Deucher authored
Reviewed-by:
-
Jammy Zhou authored
Signed-off-by:
-
Jammy Zhou authored
v2: keep using radeon folder for CIK Signed-off-by:
-
Jammy Zhou authored
Signed-off-by:
-
Jammy Zhou authored
Signed-off-by:
-
Christian König authored
Properly protect the state and also handle submission failures. Signed-off-by:
-
Christian König authored
Signed-off-by:
-
Christian König authored
Signed-off-by:
-
Christian König authored
Otherwise a process can access the GDS data of another process. Signed-off-by:
-
Jammy Zhou authored
The CE preamble IB can be dropped for the same context v2: use the flags directly v3: remove 'CE' for potential preamble usage by other rings Signed-off-by:
-
Jammy Zhou authored
Signed-off-by:
-
Jammy Zhou authored
check the filp is not robust, and sometimes different contexts may have same filp value. v2: check both filp and ctx_id Signed-off-by:
-
Jammy Zhou authored
It is required to support fence per context. v2: add amdgpu_ctx_get/put v3: improve get/put v4: squash hlock fix Signed-off-by:
-
Jack Xiao authored
Set up the CP and SDMA for proper unaligned memory access. Required for OpenCL 2.x v2: udpate commit message Signed-off-by:
Jack Xiao <Jack.Xiao@amd.com> Reviewed-by:
-
Marek Olšák authored
The existing locks were protecting the list, but not the elements. v2: rename hlock to lock Signed-off-by:
-
Marek Olšák authored
If ctx was released between put and get, then "get" would crash. Signed-off-by:
-
