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- 09 Aug, 2016 1 commit
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Fabien Lahoudere authored
In order to use sdma with UART, we need to add DMA configuration in device tree. Signed-off-by:
Fabien Lahoudere <fabien.lahoudere@collabora.co.uk> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 17 Sep, 2015 1 commit
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Lucas Stach authored
Allows to use the more meaningful IRQ flag defines instead of the raw values. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 30 Mar, 2015 1 commit
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Matt Porter authored
The chipidea driver adds an extra line of spam to the log when a host-only chipidea instance is left set to the default of a dual role controller. [ 2.010873] ci_hdrc ci_hdrc.1: doesn't support gadget Set the dr_mode property to host on all the host-only nodes to avoid this warning. Signed-off-by:
Matt Porter <mporter@konsulko.com> Acked-by:
Peter Chen <peter.chen@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- 05 Jan, 2015 2 commits
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Steffen Trumtrar authored
The i.MX53 has a SAHARA v4 core. Add it to the dtsi. Signed-off-by:
Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
Update the VPU compatible strings to also use "cnm,coda<model>". Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- 23 Nov, 2014 2 commits
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Lucas Stach authored
Add all required properties for the cpufreq-dt driver. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
SSI block has 'ipg' clock for internal peripheral access and also 'baud' clock for generating bit clock when SSI operates in master mode. Add the extra 'baud' clock so that we can have SSI functional in master mode. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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- 16 Sep, 2014 2 commits
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Steffen Trumtrar authored
The i.MX53 has a Cortex-A8 Performance Monitor Unit. Add it to the dtsi. Signed-off-by:
Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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Alexander Shiyan authored
This patch adds simple-card support to the i.MX SoCs. Signed-off-by:
Alexander Shiyan <shc_work@mail.ru> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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- 11 Sep, 2014 1 commit
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Markus Niebel authored
using LVDS channel 1 on an i.MX53 leads to following error: imx-ldb 53fa8008.ldb: unable to set di0 parent clock to ldb_di1 This comes from imx_ldb_set_clock with mux = 0. Mux parameter must be "1" for reparenting di1 clock to ldb_di1. The value of the mux param comes from device tree port settings. On i.MX5, the internal two-input-multiplexer is used. Due to hardware limitations, only one port (port@[0,1]) can be used for each channel (lvds-channel@[0,1], respectively) Documentation update suggested by Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
Markus Niebel <Markus.Niebel@tq-group.com> Fixes: e05c8c9a ("ARM: dts: imx53: Add IPU DI ports and endpoints, move imx-drm node to dtsi") Cc: <stable@vger.kernel.org> Acked-by:
Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- 18 Aug, 2014 1 commit
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Lothar Waßmann authored
The VPU on i.MX53 has two distinct clocks for register access and internal function. Signed-off-by:
Lothar Waßmann <LW@KARO-electronics.de> Fixes: fbf970f6 ("ARM: dts: mx53qsb: Enable VPU support") Cc: <stable@vger.kernel.org> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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- 18 Jul, 2014 3 commits
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Shawn Guo authored
Per the binding doc imx-sata.txt, the first entry of clock-names should be "sata" than anything else. Correct it for imx53 SATA node. It works for now only because SATA driver gets clock by index so far. Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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Steffen Trumtrar authored
The AHB to IP bridges (AIPSTZ) allow fine grained access rights management. Add both bridges to the DT. Signed-off-by:
Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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Markus Pargmann authored
All imx5*.dtsi files define the generic dma bindings. Drop the old non-generic fsl,ssi-dma-events. Signed-off-by:
Markus Pargmann <mpa@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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- 16 May, 2014 2 commits
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Philipp Zabel authored
Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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Philipp Zabel authored
This IP module is always present and has no external connections. There is no reason to disable it in the device tree. Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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- 11 May, 2014 1 commit
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Sascha Hauer authored
The IPU register space is 128MB, not 2GB. Fixes: abed9a6b 'ARM i.MX53: Add IPU support' Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Acked-by:
Shawn Guo <shawn.guo@freescale.com> Cc: <stable@vger.kernel.org> Signed-off-by:
Olof Johansson <olof@lixom.net>
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- 30 Apr, 2014 1 commit
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Marek Vasut authored
Add alias for FEC ethernet on i.MX to allow bootloaders (like U-Boot) patch-in the MAC address for FEC using this alias. Signed-off-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- 14 Apr, 2014 2 commits
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Shawn Guo authored
Per bindings of fixed-clock, #clock-cells is a required property. Let's add it for those fixed rate clocks. Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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Lothar Waßmann authored
The 'remote-endpoint' property should point back to ipu_di1_lvds1 rather than ipu_di0_lvds0. Signed-off-by:
Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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- 07 Mar, 2014 1 commit
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Philipp Zabel authored
This patch connects IPU and display encoder (VGA, LVDS) device tree nodes, as well as parallel displays on the DISP0 and DISP1 outputs, using the OF graph bindings described in Documentation/devicetree/bindings/media/video-interfaces.txt The IPU ports correspond to the two display interfaces. The order of endpoints in the ports is arbitrary. Since the imx-drm node now only needs to contain links to the display interfaces, it can be moved to the SoC dtsi level. At the board level, only connections between the display interface ports and encoders or panels have to be added. Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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- 09 Feb, 2014 6 commits
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Markus Pargmann authored
imx51-ssi and imx21-ssi are different IPs. imx51-ssi supports online reconfiguration and needs this for correct interaction with SDMA. This patch adds imx51-ssi before each imx21-ssi for all imx5 SoCs. Signed-off-by:
Markus Pargmann <mpa@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Sascha Hauer authored
Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Denis Carikli authored
This is to permit to use of the includes in the boards dts. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Grant Likely <grant.likely@linaro.org> Cc: devicetree@vger.kernel.org Cc: Sascha Hauer <kernel@pengutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: Eric Bénard <eric@eukrea.com> Signed-off-by:
Denis Carikli <denis@eukrea.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Marek Vasut authored
The AHCI-IMX driver now supports i.MX53 as well. Add DT node. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Richard Zhu <r65037@freescale.com> Cc: Tejun Heo <tj@kernel.org> Cc: Linux-IDE <linux-ide@vger.kernel.org> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Lucas Stach authored
For better readability and no need to look up numbers in the documentation anymore. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- 07 Feb, 2014 1 commit
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Rostislav Lisovy authored
Signed-off-by:
Rostislav Lisovy <lisovy@gmail.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- 13 Jan, 2014 1 commit
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Nicolin Chen authored
This reverts commit b1d27c79. Previously we switched the SSI scriprt to dual-fifo mode to reduce playback underrun issue, which is only included by SDMA firmware version 2. However, there are quite a lot people still using version 1 or default firmware in the ROM code of SoC while these two kinds of firmwares do not support the dual-fifo script and the audio function on their platform would be broken. Thus this patch provisionally reverts the dual-fifo script to the original single fifo script to meet all kinds of users' requirements, including the version 1/2 or inner ROM firmware. Reported-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Nicolin Chen <Guangyu.Chen@freescale.com> Tested-by:
Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
Shawn Guo <shawn.guo@linaro.org> Signed-off-by:
Vinod Koul <vinod.koul@intel.com>
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- 16 Dec, 2013 1 commit
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Nicolin Chen authored
Use dual-fifo sdma scripts instead of shared scripts for ssi on i.MX series. Signed-off-by:
Nicolin Chen <b42378@freescale.com> Acked-by:
Shawn Guo <shawn.guo@linaro.org> Signed-off-by:
Vinod Koul <vinod.koul@intel.com>
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- 22 Aug, 2013 8 commits
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Shawn Guo authored
Add missing ocram gate clock for imx53 and also represent it in device tree ocram node. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
Updates SSI nodes to adopt generic DMA bindings. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
To make it consistent with the other i.mx SoCs, let's add the cpus nodes. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Huang Shijie authored
Add the #dma-cells property for all the sdma in all the imx platforms. Signed-off-by:
Huang Shijie <b32955@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
Enable Video Processing Unit (VPU) support. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Philipp Zabel authored
This patch enables the On-Chip SRAM (OCRAM) on i.MX53 and i.MX6 SoCs. Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Sascha Hauer authored
This allows to order the i2c and spi devices correctly. While at it reorder the aliases entries alphabetically. Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Sascha Hauer authored
Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- 15 Jul, 2013 1 commit
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Philipp Zabel authored
The current default pad configuration for UART RX and TX pads sets a 360k pull-down and writes 1 to a reserved bit (1 << 0). It doesn't seem right to me that in idle state, the UART has to keep the signal high against a pull-down resistor. This patch instead sets a 100k pull-up, which incidentally corresponds to the register reset value for all but one (MX53_PAD_KEY_ROW0__UART4_RXD_MUX) pad, and removes the write to the reserved bit. Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- 17 Jun, 2013 1 commit
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Philipp Zabel authored
This adds the Television Encoder (TVEv2) device tree node to the i.MX53 dtsi. Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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