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  1. 09 Aug, 2016 1 commit
  2. 17 Sep, 2015 1 commit
  3. 30 Mar, 2015 1 commit
  4. 05 Jan, 2015 2 commits
  5. 23 Nov, 2014 2 commits
  6. 16 Sep, 2014 2 commits
  7. 11 Sep, 2014 1 commit
    • Markus Niebel's avatar
      ARM: DT: imx53: fix lvds channel 1 port · 1b134c9c
      Markus Niebel authored
      using LVDS channel 1 on an i.MX53 leads to following error:
      
      imx-ldb 53fa8008.ldb: unable to set di0 parent clock to ldb_di1
      
      This comes from imx_ldb_set_clock with mux = 0. Mux parameter must be "1" for
      reparenting di1 clock to ldb_di1. The value of the mux param comes from device
      tree port settings.
      
      On i.MX5, the internal two-input-multiplexer is used. Due to hardware limitations,
      only one port (port@[0,1]) can be used for each channel (lvds-channel@[0,1],
      respectively)
      
      Documentation update suggested by Philipp Zabel <p.zabel@pengutronix.de>
      Signed-off-by: default avatarMarkus Niebel <Markus.Niebel@tq-group.com>
      Fixes: e05c8c9a ("ARM: dts: imx53: Add IPU DI ports and endpoints, move imx-drm node to dtsi")
      Cc: <stable@vger.kernel.org>
      Acked-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
      Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      1b134c9c
  8. 18 Aug, 2014 1 commit
  9. 18 Jul, 2014 3 commits
  10. 16 May, 2014 2 commits
  11. 11 May, 2014 1 commit
  12. 30 Apr, 2014 1 commit
  13. 14 Apr, 2014 2 commits
  14. 07 Mar, 2014 1 commit
    • Philipp Zabel's avatar
      ARM: dts: imx53: Add IPU DI ports and endpoints, move imx-drm node to dtsi · e05c8c9a
      Philipp Zabel authored
      This patch connects IPU and display encoder (VGA, LVDS)
      device tree nodes, as well as parallel displays on the DISP0
      and DISP1 outputs, using the OF graph bindings described in
      Documentation/devicetree/bindings/media/video-interfaces.txt
      
      The IPU ports correspond to the two display interfaces. The
      order of endpoints in the ports is arbitrary.
      
      Since the imx-drm node now only needs to contain links to the
      display interfaces, it can be moved to the SoC dtsi level. At
      the board level, only connections between the display interface
      ports and encoders or panels have to be added.
      Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      e05c8c9a
  15. 09 Feb, 2014 6 commits
  16. 07 Feb, 2014 1 commit
  17. 13 Jan, 2014 1 commit
  18. 16 Dec, 2013 1 commit
  19. 22 Aug, 2013 8 commits
  20. 15 Jul, 2013 1 commit
    • Philipp Zabel's avatar
      ARM i.MX53: Fix UART pad configuration · f5786b8e
      Philipp Zabel authored
      The current default pad configuration for UART RX and TX pads sets a 360k
      pull-down and writes 1 to a reserved bit (1 << 0). It doesn't seem right to
      me that in idle state, the UART has to keep the signal high against a
      pull-down resistor.
      
      This patch instead sets a 100k pull-up, which incidentally corresponds to the
      register reset value for all but one (MX53_PAD_KEY_ROW0__UART4_RXD_MUX) pad,
      and removes the write to the reserved bit.
      Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
      Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
      f5786b8e
  21. 17 Jun, 2013 1 commit