- 21 Jun, 2019 40 commits
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Jack Xiao authored
Add ib preemption status in amdgpu_job, so that ring level function can detect preemption and program for resuming it. v2: squash in fix to restore job->preamble_status back to status value (Jack) Acked-by:
Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
Jack Xiao <Jack.Xiao@amd.com> Signed-off-by:
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Jack Xiao authored
CSA is the Context Save Area for preemption. Acked-by:
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Jack Xiao authored
Add mcbp driver parameter, so that mcbp feature can be enabled/disabled by driver parameter. Acked-by:
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Rex Zhu authored
Used to trigger preemtption Acked-by:
Rex Zhu <Rex.Zhu@amd.com> Signed-off-by:
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Jack Xiao authored
The trailing fence for ring is used to track the completion of preemption. Acked-by:
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Rex Zhu authored
can preempt the ring by setting cond_exec to false Acked-by:
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Le.Ma authored
Virtual display is a pure sw implementation of KMS for use in virtualization and for bring up and emulation. Signed-off-by:
Le.Ma <Le.Ma@amd.com> Reviewed-by:
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Hawking Zhang authored
Not used on Navi10. Signed-off-by:
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Hawking Zhang authored
So the dependencies are properly handled. Signed-off-by:
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Huang Rui authored
This patch loades smc ucode at first with psp while rlc auto load is supported on navi10. Signed-off-by:
Huang Rui <ray.huang@amd.com> Reviewed-by:
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Hawking Zhang authored
Required for production hw and vddgfx. Signed-off-by:
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Hawking Zhang authored
When autoload is enabled, there is no need to load mec jt, RLC will handle it automatically Signed-off-by:
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Hawking Zhang authored
rlc autoload is supported since navi10 Signed-off-by:
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Hawking Zhang authored
RLC autoload is supported since from Navi10 Signed-off-by:
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Hawking Zhang authored
new psp gfx cmd is introuduced for rlc autoload v2: rebase (Alex) Signed-off-by:
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Hawking Zhang authored
Since from navi10, the tmr_size should be decided by psp sos according to toc header. Driver should issue LOAD_TOC to psp sos to get the tmr_size needed. The allocation of tmr_size then should be done only when sos/sysdrv loading completed Accordingly, asd_init also move to psp_hw_start after sos fw loading to make calling sequence consistent. Signed-off-by:
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Hawking Zhang authored
Navi10 will have toc built-in sos binary so that using header.ucode_size_bytes minus sos_size_bytes actually is not sys_bin_size. Using sos_offset_bytes works for both vega20 (psp_firmware_header_v1_0) and navi10 (psp_firmware_header_v1_1) Signed-off-by:
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Hawking Zhang authored
RLC handles firmware loading for gfx to support vddgfx feature. Signed-off-by:
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Hawking Zhang authored
Add support for the new load TOC command. Signed-off-by:
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Hawking Zhang authored
Update the psp interface for the new commands. v2: rebase (Alex) FIXME: GFX_CMD_ID_PROG_REG = 0x0000000B, /* program regs */ GFX_CMD_ID_LOAD_TOC = 0x0000000B, /* Load TOC and obtain TMR size */ Signed-off-by:
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Hawking Zhang authored
Support version 1.1. Signed-off-by:
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Hawking Zhang authored
Print the psp header data if requested. Signed-off-by:
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Hawking Zhang authored
print the psp header data like we do for other firmwares. Signed-off-by:
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Hawking Zhang authored
This is to differentiate rlc backdoor autoload from rlc frontdoor autoload Signed-off-by:
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Hawking Zhang authored
Instead of putting toc into driver source code, the toc will be part of psp_sos fw. Driver need to get and parse it from psp fw Signed-off-by:
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Hawking Zhang authored
psp_firmware_header_v1_1 is used for psp sos with build-in toc Signed-off-by:
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Hawking Zhang authored
Table Of Content (TOC) is used by RLC to auto load gc firmwares. PSP need to parse the toc to calculate the tmr size needed and load gc firmwares to tmr for RLC to auto load them finally Signed-off-by:
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Tao Zhou authored
Add psp 11.0 code for navi10. psp 11.0 is not enabled for now. Will enable it when psp 11.0 firmware is available. Signed-off-by:
Tao Zhou <Tao.Zhou1@amd.com> Reviewed-by:
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Huang Rui authored
For bring up. Signed-off-by:
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Le.Ma authored
Add another firmware load type AMDGPU_FW_LOAD_RLC_AUTO to support firmware autoloading new feature in gfx10. This flag can be leveraged for future engines that need autoload fw. Signed-off-by:
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Le.Ma authored
Allocate a visible framebuffer to store all gfxip ucodes as the format of TOC. Signed-off-by:
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Hawking Zhang authored
IH is the interrupt handler block. v1: add initial ih support (Ray) v2: add dummy prescreen iv function for navi10 (Hawking) v3: squash in additional updates (Alex) Signed-off-by:
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Hawking Zhang authored
interrupt source packet definitions for the display block (DCN). Signed-off-by:
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Hawking Zhang authored
Add the interrupt source packet definitions. v2: update (Alex) Signed-off-by:
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Hawking Zhang authored
Add the interrupt source packet definitions. Signed-off-by:
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Hawking Zhang authored
Add the interrupt source packet definitions. Signed-off-by:
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Hawking Zhang authored
GMC in the GPU memory controller. v1: add place holder and initial basic implementation (Ray) v2: retire unused amdgpu_gart_set_defaults (Hawking) v3: re-work get_vm_pde function (Hawking) v4: replace legacy amdgpu_vram/gtt_location with amdgpu_gmc_vram/gtt_location (Hawking) v5: squash in updates (Alex) v6: use get_vbios_fb_size (Alex) Signed-off-by: -
Hawking Zhang authored
mmhub is the memory controller hub for multi-media (VCN). v1: add place holder and initial functions (Ray) v2: replace legacy amdgpu_mc structure with amdgpu_gmc (Hawking) v3: switch to use amdgpu_gmc_pd_addr (Hawking) v4: squash in updates (Alex) Signed-off-by:
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Hawking Zhang authored
gfxhub is the memory controller hub for gfx and sdma. v1: add place holder and initial basic functions (Ray) v2: replace the refernce to legacy mc structure with gmc structure remove the direct use of gart.table_addr (Hawking) v3: switch to use amdgpu_gmc_pd_addr (Hawking) v4: squash in updates (Alex) Signed-off-by: -
Jack Xiao authored
Due to GCR change from navi10, the PTE encoding of PRT needs change VSCTL = 01111 (was 0XX1X). Signed-off-by:
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