- 13 Oct, 2011 1 commit
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Mark Brown authored
Support raw reads if all the registers being read are volatile, the cache will have no impact for tem. Support bulk reads either directly (if all the registers are volatile) or by falling back to iterating over single register reads otherwise. Signed-off-by:Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 10 Oct, 2011 5 commits
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Mark Brown authored
We only really need the defaults in order to cut down the number of registers we sync and to satisfy reads while the device is powered off but not all devices are going to need to do that (always on devices like PMICs being the prime example) so don't require those devices to supply a default. Instead only try to fall back to hardware defaults if the driver told us to. Devices using LZO won't be able to instantiate with this, that will require some updates in the LZO code to handle this case. Signed-off-by:
Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
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Mark Brown authored
Simplify the check for registers set at their default value by avoiding picking a default value in the case where we don't have one. Instead we only compare the current value to the current value when we looked one up. This fixes the case where we don't have a default stored but the value was set to zero when that isn't the chip default. Signed-off-by:
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Mark Brown authored
Ensure that when we start up in cache only mode we can store defaults of zero, otherwise if the hardware is unavailable we won't be able to read. Signed-off-by:
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Mark Brown authored
As with the bulk reads we really should be able to make these play nicely with the cache but warn for now. Signed-off-by:
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Mark Brown authored
If a register isn't cached then let callers know that so they can fall back or error handle appropriately. Signed-off-by:
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- 09 Oct, 2011 1 commit
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Mark Brown authored
Rather than open coding a binary search use the standard bsearch() using the comparison function we're already using for sort() on insert. This fixes a lockup I was observing due to iterating on min <= max rather than min < max when we fail to look up. Signed-off-by:
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- 03 Oct, 2011 2 commits
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Dimitris Papastamos authored
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Dimitris Papastamos authored
Since there are more lookups than insertions in a typical scenario, optimize the linear search into a binary search. For this to work, we need to keep reg_defaults sorted upon insertions, for now be lazy and use sort(). Signed-off-by:
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- 30 Sep, 2011 5 commits
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Dimitris Papastamos authored
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Dimitris Papastamos authored
Ensure we've got a function so users can enable/disable the cache bypass option. Signed-off-by:
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Dimitris Papastamos authored
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Dimitris Papastamos authored
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Mark Brown authored
An apostrophe does not mean "look out, here comes an s!". Signed-off-by:
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- 29 Sep, 2011 2 commits
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Dimitris Papastamos authored
Signed-off-by:
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Mark Brown authored
Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
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- 28 Sep, 2011 5 commits
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Dimitris Papastamos authored
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Dimitris Papastamos authored
In preperation for the upcoming patches, modify map->cache_bypass directly. The helper functions will grab an exclusive lock. Because we'll have acquired the same lock we need to avoid a deadlock. Signed-off-by:
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Dimitris Papastamos authored
We want to use regmap_write() to actually write anything to the HW. Signed-off-by:
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Lars-Peter Clausen authored
Move the handling of the cached rbnode into regcache_rbtree_lookup. This allows us to remove of some duplicated code sections in regcache_rbtree_read and regcache_rbtree_write. Signed-off-by:
Lars-Peter Clausen <lars@metafoo.de> Acked-by:
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Lars-Peter Clausen authored
Use regcache_{set,get}_val in regcache_rbtree_{set,get}_register instead of re-implementing its functionality. Signed-off-by:
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- 27 Sep, 2011 3 commits
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Dimitris Papastamos authored
In the absence of a sync callback, do it manually. This of course can't take advantange of the specific optimizations of each cache type but it will do well enough in most cases. Signed-off-by:
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Dimitris Papastamos authored
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Dimitris Papastamos authored
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- 20 Sep, 2011 1 commit
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Mark Brown authored
In systems where there is no hardware signal from the processor to the PMIC to initiate the final power off sequence we must initiate the shutdown with a register write to the PMIC. Support such systems in the driver. Since this may prevent a full shutdown of the system platform data is used to enable the feature. Signed-off-by:
Samuel Ortiz <sameo@linux.intel.com>
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- 19 Sep, 2011 9 commits
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
Avoid extra special casing by setting the cache_bypass flag when we're not caching. Signed-off-by: -
Dimitris Papastamos authored
This patch incorporates the regcache core code into regmap. All previous patches have been no-ops essentially up to this point. The bulk read operation is not supported by regcache at the moment. This will be implemented incrementally. Signed-off-by:
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Dimitris Papastamos authored
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Dimitris Papastamos authored
This patch adds support for LZO compression when storing the register cache. For a typical device whose register map would normally occupy 25kB or 50kB by using the LZO compression technique, one can get down to ~5-7kB. There might be a performance penalty associated with each individual read/write due to decompressing/compressing the underlying cache, however that should not be noticeable. These memory benefits depend on whether the target architecture can get rid of the memory occupied by the original register defaults cache which is marked as __devinitconst. Nevertheless there will be some memory gain even if the target architecture can't get rid of the original register map, this should be around ~30-32kB instead of 50kB. Signed-off-by:
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Dimitris Papastamos authored
This patch adds support for the rbtree cache compression type. Each rbnode manages a variable length block of registers. There can be no two nodes with overlapping blocks. Each block has a base register and a currently top register, all the other registers, if any, lie in between these two and in ascending order. The reasoning behind the construction of this rbtree is simple. In the snd_soc_rbtree_cache_init() function, we iterate over the register defaults provided by the regcache core. For each register value that is non-zero we insert it in the rbtree. In order to determine in which rbnode we need to add the register, we first look if there is another register already added that is adjacent to the one we are about to add. If that is the case we append it in that rbnode block, otherwise we create a new rbnode with a single register in its block and add it to the tree. There are various optimizations across the implementation to speed up lookups by caching the most recently used rbnode. Signed-off-by:
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Dimitris Papastamos authored
This is the simplest form of a cache available in regcache. Any registers whose default value is 0 are ignored. If any of those registers are modified in the future, they will be placed in the cache on demand. The cache layout is essentially using the provided register defaults by the regcache core directly and does not re-map it to another representation. Signed-off-by:
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Dimitris Papastamos authored
This patch introduces caching support for regmap. The regcache API has evolved essentially out of ASoC soc-cache so most of the actual caching types (except LZO) have been tested in the past. The purpose of regcache is to optimize in time and space the handling of register caches. Time optimization is achieved by not having to go over a slow bus like I2C to read the value of a register, instead it is cached locally in memory and can be retrieved faster. Regarding space optimization, some of the cache types are better at packing the caches, for e.g. the rbtree and the LZO caches. By doing this the sacrifice in time still wins over doing I2C transactions. Signed-off-by:
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- 09 Sep, 2011 2 commits
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Mark Brown authored
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Mark Brown authored
Add the externally visible interface introduced by Lars-Peter's commit 6f3064 (regmap: Add support for device specific write and read flag masks) separately in order to allow merge into other subsystems for integration with drivers. Drivers relying on this feature will not be functional until they are merged with the implementation. Signed-off-by:
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- 05 Sep, 2011 4 commits
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Lars-Peter Clausen authored
Make the debugfs stubs static inline to avoid future compilation issues due to duplicated symbols when CONFIG_DEBUG_FS=n once internal.h is included by multiple source files. Signed-off-by:
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Lars-Peter Clausen authored
Some buses like SPI have no standard notation of read or write operations. The general scheme here is to set or clear specific bits in the register address to indicate whether the operation is a read or write. We already support having a read flag mask per bus, but as there is no standard the bits which need to be set or cleared differ between devices and vendors, thus we need a mechanism to specify them per device. This patch adds two new entries to the regmap_config struct, read_flag_mask and write_flag_mask. These will be or'ed onto the top byte when doing a read or write operation. If both masks are empty the device will fallback to the regmap_bus masks. Signed-off-by:
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Mark Brown authored
Off by one in the array iteration. Reported-by:
Jonathan Cameron <jic23@cam.ac.uk> Signed-off-by:
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Mark Brown authored
No longer used as users link directly with the bus types so the core module infrastructure does refcounting for us. Signed-off-by:
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