- 15 Jul, 2016 2 commits
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Sergei Shtylyov authored
Simon Horman told me that R8A7792 has ADSP clock based on an incorrect table in the most recent R-Car gen2 manual. But when I received that manual I discovered that this is false: R8A7792 is the only Gen 2 SoC that doesn't have ADSP at all. Accordingly remove the ADSP clock from DT for the r8a7792. Signed-off-by:
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Despite the fact that QSPI clock has PLL1/VCOx1/4 clock as a parent, the latter hasn't been added to the R8A7792 device tree. This patch corrects that oversight. Signed-off-by:
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- 30 Jun, 2016 1 commit
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Sergei Shtylyov authored
Add the device tree nodes for the Advanced Power Management Unit (APMU) and the second Cortex-A15 CPU core. Use the "enable-method" prop to point out that the APMU should be used for the SMP support. Signed-off-by:
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- 29 Jun, 2016 9 commits
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Magnus Damm authored
Add DT nodes for the Advanced Power Management Unit (APMU) and the second CPU core. Use the enable-method to point out that the APMU should be used for SMP support. Signed-off-by:
Magnus Damm <damm+renesas@opensource.se> Signed-off-by:
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Magnus Damm authored
Add a DT node for the Advanced Power Management Units (APMU), and use the enable-method to point out that the APMU should be used for SMP support. Signed-off-by:
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Magnus Damm authored
Add DT nodes for the Advanced Power Management Units (APMU), and use the enable-method to point out that the APMU should be used for SMP support. Signed-off-by:
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Magnus Damm authored
Add DT binding documentation for the APMU hardware and add "renesas,apmu" to the list of enable methods for the ARM cpus. Signed-off-by:
Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by:
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Geert Uytterhoeven authored
Change the console alias to "serial0", for consistency with other boards (the first unlabeled serial port is always called "serial0"). This does change the serial console from /dev/ttySC4 to /dev/ttySC0. Add the serial port config to "chosen/stdout-path", which requires referring to the port by alias. Drop the "console=" parameters from the kernel command line, as they're no longer needed for DT-based platforms. Signed-off-by:
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Geert Uytterhoeven authored
Add a "serial1" alias for the serial console (it is labeled "uart1"). Add the serial port config to "chosen/stdout-path", which requires referring to the port by alias. Drop the "console=" parameter from the kernel command line, as it's no longer needed for DT-based platforms. Signed-off-by:
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Geert Uytterhoeven authored
Add the serial port config to "chosen/stdout-path", which requires referring to the port by alias. Signed-off-by:
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Geert Uytterhoeven authored
Change the console alias to "serial0", for consistency with other boards (the first unlabeled serial port is always called "serial0"). This does change the serial console from /dev/ttySC2 to /dev/ttySC0. Add the serial port config to "chosen/stdout-path", which requires referring to the port by alias. Signed-off-by:
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Geert Uytterhoeven authored
Change the console alias to "serial0", for consistency with other boards (the first unlabeled serial port is always called "serial0"). This does change the serial console from /dev/ttySC1 to /dev/ttySC0. Add the serial port config to "chosen/stdout-path", which requires referring to the port by alias. Drop the "console=" parameters from the kernel command line, as they're no longer needed for DT-based platforms. Signed-off-by:
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- 24 Jun, 2016 3 commits
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Sergei Shtylyov authored
Describe JPEG Processing Unit (JPU) in the R8A7792 device tree. Signed-off-by:
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Sergei Shtylyov authored
Add JPU clock and its parent, M2 clock to the R8A7792 device tree. Signed-off-by:
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Sergei Shtylyov authored
Add the (previously omitted) DU pin data to the SILK board's device tree. Signed-off-by:
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- 16 Jun, 2016 9 commits
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Sergei Shtylyov authored
R8A7792 SoC doesn't have the EtherMAC core, so SMSC LAN89218 Ethernet chip was used instead on the Blanche board; this chip is compatible with SMSC LAN9115 for which there's a (device tree aware) driver. Describe the chip in the Blanche device tree; enable DHCP and NFS root in the kernel command line for the kernel booting. Signed-off-by:
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Sergei Shtylyov authored
Add the initial device tree for the R8A7792 SoC based Blanche board. The board has 2 debug serial ports: SCIF0 and SCIF3; include support for them, so that the serial console can work. Signed-off-by:
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Sergei Shtylyov authored
Document the Blanche device tree bindings, listing it as a supported board. This allows to use checkpatch.pl to validate .dts files referring to the Blanche board. Signed-off-by:
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Sergei Shtylyov authored
Describe the IRQC interrupt controller in the R8A7792 device tree. Signed-off-by:
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Sergei Shtylyov authored
Describe [H]SCIFs in the R8A7792 device tree. Signed-off-by:
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Sergei Shtylyov authored
Describe SYS-DMAC0/1 in the R8A7792 device tree. Signed-off-by:
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Sergei Shtylyov authored
The initial R8A7792 SoC device tree including CPU cores, GIC, timer, SYSC, and the required clock descriptions. Signed-off-by:
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Sergei Shtylyov authored
Add macros usable by the device tree sources to reference R8A7792 SYSC power domains by index. Signed-off-by:
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Sergei Shtylyov authored
Add macros usable by the device tree sources to reference the R8A7792 clocks by index. Signed-off-by:
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- 14 Jun, 2016 16 commits
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Geert Uytterhoeven authored
Name the Pin Function Controller subnode for SCIFA4 after its device name, instead of after the serial port alias. This avoids conflicts when adding support for more serial ports later, either here or in a DT overlay. Signed-off-by:
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Geert Uytterhoeven authored
Name the Pin Function Controller subnode for QSPI after its device name, instead of after the spi interface alias. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by:
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Geert Uytterhoeven authored
Name the Pin Function Controller subnode for SCIF2 after its device name, instead of using some arbitrary name that looks like a serial port alias, but differs from the actual alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by:
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Geert Uytterhoeven authored
Name the Pin Function Controller subnode for QSPI after its device name, instead of after the spi interface alias. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by:
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Geert Uytterhoeven authored
Name the Pin Function Controller subnode for SCIF2 after its device name, instead of using some arbitrary name that looks like a serial port alias, but differs from the actual alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by:
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Geert Uytterhoeven authored
Name the Pin Function Controller subnode for QSPI after its device name, instead of after the spi interface alias. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by:
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Geert Uytterhoeven authored
Name the Pin Function Controller subnodes for SCIF0 and SCIF1 after their device names, instead of after the serial port aliases. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by:
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Geert Uytterhoeven authored
Name the Pin Function Controller subnode for QSPI after its device name, instead of after the spi interface alias. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by:
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Geert Uytterhoeven authored
Name the Pin Function Controller subnode for SCIF0 after its device name, instead of after the serial port alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by:
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Geert Uytterhoeven authored
Name the Pin Function Controller subnodes for QSPI and MSIOF0 after their device names, instead of after the spi interface aliases. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by:
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Geert Uytterhoeven authored
Name the Pin Function Controller subnodes for SCIF0 and SCIF1 after their device names, instead of after the serial port aliases. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by:
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Geert Uytterhoeven authored
Name the Pin Function Controller subnode for VIN1 after its device name, instead of using the generic and indexless "vin". This avoids conflicts when enabling support for more video inputs later, either here or in a DT overlay. Signed-off-by:
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Geert Uytterhoeven authored
Name the Pin Function Controller subnodes for QSPI and MSIOF1 after their device names, instead of after the spi interface aliases. This avoids conflicts when enabling support for more spi interfaces later, either here or in a DT overlay. Signed-off-by:
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Geert Uytterhoeven authored
Name the Pin Function Controller subnodes for SCIF0 and SCIFA1 after their device names, instead of after the serial port aliases. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by:
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Geert Uytterhoeven authored
Name the Pin Function Controller subnodes for SCIF2 and SCIF4 after their device names, instead of using some arbitrary names that look like serial port aliases, but differ from the actual aliases. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by:
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Geert Uytterhoeven authored
Name the Pin Function Controller subnode for SCIF0 after its device name, instead of after the serial port alias. This avoids conflicts when enabling support for more serial ports later, either here or in a DT overlay. Signed-off-by:
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