Now that all OMAP boards are using the board resources, we don't need
to keep the arch/board specific crap in the driver header.

Cc: linux-net@vger.kernel.org
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Use smc91x_platdata to setup smc91x, so we can get rid of OMAP specific stuff
in smc91x driver
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Add 36xx CBP package support

Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Remove old mux code for 34xx
Signed-off-by: Tony Lindgren <tony@atomide.com>

Replace omap_cfg_reg() with new style signal or gpio functions
Signed-off-by: Tony Lindgren <tony@atomide.com>

Otherwise we cannot limit new mux code to mach-omap2.
The same signal names should eventually work for other
omaps under mach-omap2.

Note that these pins don't need to be OMAP_PIN_INPUT_PULLUP,
just OMAP_PIN_INPUT is enough.

Cc: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Add debugfs support for new mux code
Signed-off-by: Tony Lindgren <tony@atomide.com>

Add new style mux init functions to omap3 board-*.c files

So far Beagle has been confirmed to be a CBB package,
and CM-T35 a CUS package.
Signed-off-by: Tony Lindgren <tony@atomide.com>

Add new style mux data for 34xx. This should also
work with 3630 easily by adding the processor subset
and ball data.

Note that this data is __initdata, and gets optimized
out except for the GPIO pins if CONFIG_OMAP_MUX
is not set.

Also note that this data uses omap3630 naming for
the SDMMC registers instead of 34xx naming with just
MMC.

Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Initially only for 34xx. This code allows us to:

- Make the code more generic as the omap internal signal
  names can stay the same across omap generations for some
  devices

- Map mux registers to GPIO registers that is needed for
  dynamic muxing of pins during off-idle

- Override bootloader mux values via kernel cmdline using
  omap_mux=some.signa1=0x1234,some.signal2=0x1234

- View and set the mux registers via debugfs if
  CONFIG_DEBUG_FS is enabled

Cc: Mike Rapoport <mike@compulab.co.il>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

intoduce omap_mux_{read,write}
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>

An api at init for all dpll nodes seem to be
needed to reparent the dpll clk node to its
bypass clk in case the dpll is in bypass.
If not done this causes sequencing issues at init
during propogate_rate.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

Most of the dpll api's from dpll.c are reused for OMAP4.
This patch does extend a few api's for OMAP4 support.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch moves all the dpll control api's to a
common file dpll.c. This is in preperation of omap4
support wherein most of these api's can be reused.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch adds dummy hooks for OMAP4 dpll api's. Removes
dummy hooks for clkdev api's and enables CLKDEV
for OMAP4.
Also comments clockdomain calls from within the clock
framework as its not supported yet for OMAP4.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch defines all the clock nodes in OMAP4430
platform. All the clock node structs and the clkdev table is
autogenerated using a python script (gen_clock_tree.py)
developed by Paul Walmsley, Benoit Cousson and Rajendra Nayak.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch adds OMAP4 specific CM1 and CM2 module
register field masks. Auto generated using a python
script (gen_cm_shifts_and_mask.py) developed by Benoit
Cousson, Paul Walmsley and Rajendra Nayak.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch adds OMAP4 specific PRM register bit field
shifts and masks. Auto generated using a python script
(gen_prm_shifts_and_mask.py) developed by Benoit Cousson,
Paul Walmsley and Rajendra Nayak.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch adds OMAP4 specific PRM register defs. Auto generated
using a python script (gen_prm_4430_h.py) developed by Paul
Walmsley and Benoit Cousson.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch adds OMAP4 specific CM1 and CM2 module
register defs. Autogenerated using a python scripts
(gen_cm1_4430_h.py,gen_cm2_4430_h.py) developed
by Paul Walmsley and Benoit Cousson.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch adds the offsets for new modules in PRM
and CM for OMAP4
These are autogenerated using a python script (gen_prcm44xx_h.py)
developed by Paul Walmsley and Benoit Cousson.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

This patch fixes the PRM and CM base addresses and adds
a new CM2 base address for OMAP4
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

Rather than having to do a usecs = nsecs / NSECS_PER_USEC to
track latency in usecs, just track it in nanoseconds.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

Use

   usecs = nsecs / NSEC_PER_USEC;

instead of

   usecs = nsecs * NSEC_PER_USEC;
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

WARN if a clock/hwmod is missing a clockdomain association since
resulting hwmod will not be able to correctly enable/disable clocks.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

During suspend and resume, when omap_device deactivation and
activation is happening, the timekeeping subsystem has likely already
been suspended.  Thus getnstimeofday() will fail and trigger a WARN().

Use read_persistent_clock() instead of getnstimeofday() to avoid this.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

The _dev_wakeup_lat_limit field of struct omap_device is u32, so use
UINT_MAX instead of INT_MAX for the default maximum.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

Following the model of to_platform_device(), add to_omap_device()
macro so a platform_device pointer can be converted into an
omap_device pointer.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

Earlier, the hwmod code had considered the OCP_SYSCONFIG.CLOCKACTIVITY
bits to be incremental power saving bits, controlling internal IP
block clock gates.  This was a misapprehension.  The CLOCKACTIVITY
bits are used to indicate, in advance, which clocks will be cut when
the module acknowledges an idle request.  This enables the IP block to
take whatever action is necessary to complete any in-progress work
before asserting its IdleAck.

In the current Linux-OMAP code, this implies that the clock framework
should be changing module CLOCKACTIVITY bits as module clocks are enabled
and disabled.  We don't do that yet, but in the future, we should.
This must wait until the clock tree is annotated with omap_hwmod pointers
(or vice-versa).  In the meantime, drop most of the hwmod code that
controls CLOCKACTIVITY bits to avoid confusion.

This patch has benefited from many illuminating discussions with (in
alphabetical order) Benoît Cousson <b-cousson@ti.com>, Rajendra Nayak
<rnayak@ti.com>, and Sebastien Sabatier <s-sabatier1@ti.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Sebastien Sabatier <s-sabatier1@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>

Replace the existing u8 array of module MPU IRQ lines with a struct
that includes a name - similar to the existing struct
omap_hwmod_dma_info.  Device drivers can then use
platform_get_resource_byname() to retrieve specific IRQs without nasty
dependencies on array ordering.

Thanks to Benoît Cousson <b-cousson@ti.com> and Kevin Hilman
<khilman@deeprootsystems.com> for feedback on this approach.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>

This patch fills in the OCP_SYSCONFIG.AUTOIDLE handling in the OMAP
hwmod code.

After this patch, the hwmod code will set the module AUTOIDLE bit
(generally <module>.OCP_SYSCONFIG.AUTOIDLE) to 1 by default upon
enable.  If the hwmod flag HWMOD_NO_OCP_AUTOIDLE is set, AUTOIDLE will
be set to 0 upon enable.  Upon module disable, AUTOIDLE will be set to
1.

Enabling module autoidle should save some power.  The only reason to
not set the OCP_SYSCONFIG.AUTOIDLE bit is if there is a bug in the
module RTL, e.g., the MPUINTC block on OMAP3.

Comments from Kevin Hilman <khilman@deeprootsystems.com> inspired this patch,
and Kevin tested an earlier version of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>

Reprogram the module's OCP_SYSCONFIG register after module reset (SOFTRESET
= 1).  This may not be needed, but the definition of the reset performed by
the SOFTRESET bit is unclear.

Kevin Hilman <khilman@deeprootsystems.com> tested an earlier version of
this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>

Fix loop bailout off-by-one bugs reported by Juha Leppänen
<juha_motorsportcom@luukku.com>.

This second version incorporates comments from Russell King
<linux@arm.linux.org.uk>.  A new macro, 'omap_test_timeout', has
been created, with cleaner code, and existing code has been converted
to use it.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Juha Leppänen <juha_motorsportcom@luukku.com>
Cc: Russell King <linux@arm.linux.org.uk>

MPU power domain bank 0 bits are displayed in position of bank 1
in PWRSTS and PREPWRSTS registers. So read them from correct
position
Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

The code that reprograms the SDRC memory controller during CORE DVFS,
mach-omap2/sram34xx.S:omap3_sram_configure_core_dpll(), does not
ensure that all L3 initiators are prevented from accessing the SDRAM
before modifying the SDRC AC timing and MR registers.  This can cause
memory to be corrupted or cause the SDRC to enter an unpredictable
state.  This patch places that code behind a Kconfig option,
CONFIG_OMAP3_SDRC_AC_TIMING for now, and adds a note explaining what
is going on.  Ideally the code can be added back in once supporting
code is present to ensure that other initiators aren't touching the
SDRAM.  At the very least, these registers should be reprogrammable
during kernel init to deal with buggy bootloaders.  Users who know
that all other system initiators will not be touching the SDRAM can
also re-enable this Kconfig option.

This is a modification of a patch originally written by Rajendra Nayak
<rnayak@ti.com> (the original is at http://patchwork.kernel.org/patch/51927/).
Rather than removing the code completely, this patch just comments it out.

Thanks to Benoît Cousson <b-cousson@ti.com> and Christophe Sucur
<c-sucur@ti.com> for explaining the technical basis for this and for
explaining what can be done to make this path work in future code.
Thanks to Richard Woodruff <r-woodruff2@ti.com>, Nishanth Menon
<nm@ti.com>, and Olof Johansson <olof@lixom.net> for their comments.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Christophe Sucur <c-sucur@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Olof Johansson <olof@lixom.net>

IS_ERR returns only 1 or 0, and the functions return a negative error
in other cases anyways.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

This patch rearranges the order of structure members in struct powerdomain
to avoid wasting memory due to alignment restrictions.
Signed-off-by: Paul Walmsley <paul@pwsan.com>

Replace some bare constants with power states.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>

OMAP24xx chips don't support software-configurable sleep dependencies.
Test early for this so the compiler can redact the entire function body
on OMAP24xx.
Signed-off-by: Paul Walmsley <paul@pwsan.com>