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- 26 Feb, 2020 2 commits
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Yong Zhao authored
The queues represented in queue_bitmap are only CP queues. Signed-off-by:
Yong Zhao <Yong.Zhao@amd.com> Acked-by:
Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Divya Shikre authored
Devices from Arcturus onwards will have their UUID exposed to Thunk. Adding neccessary functions to the kernel to propagate the uuid. Signed-off-by:
Divya Shikre <DivyaUday.Shikre@amd.com> Signed-off-by:
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- 19 Dec, 2019 2 commits
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Huang Rui authored
Thunk driver would like to know the num_cp_queues data, however this data relied on different asic specific. So it's better to get it from kfd driver. v2: don't update name size. Signed-off-by:
Huang Rui <ray.huang@amd.com> Reviewed-by:
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Huang Rui authored
Thunk driver would like to know the num_sdma_queues_per_engine data, however this data relied on different asic specific. So it's better to get it from kfd driver. v2: don't update the name size. Signed-off-by:
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- 07 Oct, 2019 1 commit
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Harish Kasiviswanathan authored
Participate in device cgroup. All kfd devices are exposed via /dev/kfd. So use /dev/dri/renderN node. Before exposing the device to a task check if it has permission to access it. If the task (based on its cgroup) can access /dev/dri/renderN then expose the device via kfd node. If the task cannot access /dev/dri/renderN then process device data (pdd) is not created. This will ensure that task cannot use the device. In sysfs topology, all device nodes are visible irrespective of the task cgroup. The sysfs node directories are created at driver load time and cannot be changed dynamically. However, access to information inside nodes is controlled based on the task's cgroup permissions. Signed-off-by:
Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by:
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- 03 Oct, 2019 2 commits
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Harish Kasiviswanathan authored
This is required to check against cgroup permissions. Signed-off-by:
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shaoyunl authored
Keep the same use of CHIP_IDs for navi12 in kfd Signed-off-by:
shaoyunl <shaoyun.liu@amd.com> Reviewed-by:
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- 16 Sep, 2019 2 commits
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Huang Rui authored
This patch adds renoir kfd topology which is the same with Raven. Signed-off-by:
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Yong Zhao authored
Initial support of Navi14 in KFD. The device IDs will be added later. Signed-off-by:
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- 22 Aug, 2019 1 commit
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Yong Zhao authored
The name field in node topology has not been used. We re-purpose it to hold the asic name, which can be queried by user space applications through sysfs. Signed-off-by:
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- 18 Jul, 2019 1 commit
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Yong Zhao authored
Add initial support for ARCTURUS to kfd. Signed-off-by:
Oak Zeng <Oak.Zeng@amd.com> Signed-off-by:
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- 21 Jun, 2019 1 commit
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Philip Cox authored
KFD (kernel fusion driver) is the kernel driver for the compute backend for usermode compute stack. v2: squash in updates (Alex) v3: squash in rebase fixes (Alex) Signed-off-by:
Philip Cox <Philip.Cox@amd.com> Acked-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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- 11 Jun, 2019 1 commit
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Oak Zeng authored
Move HSA_CAP_ATS_PRESENT initialization logic from kfd iommu codes to kfd topology codes. This removes kfd_iommu_device_init's dependency on kfd_topology_add_device. Also remove duplicate code setting the same. Signed-off-by:
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- 28 May, 2019 1 commit
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Oak Zeng authored
Add amdgpu_amdkfd interface to get num_gws and add num_gws to /sys/class/kfd/kfd/topology/nodes/x/properties. Only report num_gws if MEC FW support GWS barriers. Currently it is determined by a module parameter which will be replaced with MEC FW version check when firmware is ready. Signed-off-by:
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- 24 May, 2019 3 commits
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Amber Lin authored
A multi-socket server can have multiple PCIe segments so BFD is not enough to distingush each GPU. Also add domain number into account when generating gpu_id. Signed-off-by:
Amber Lin <Amber.Lin@amd.com> Reviewed-by:
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Kent Russell authored
Add the VegaM information to KFD Signed-off-by:
Kent Russell <kent.russell@amd.com> Reviewed-by:
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Oak Zeng authored
Expose available numbers of both SDMA queue types in the topology. Signed-off-by:
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- 29 Apr, 2019 1 commit
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Heiner Kallweit authored
Use new helper pci_dev_id() to simplify the code. Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Acked-by:
Christian König <christian.koenig@amd.com>
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- 19 Mar, 2019 1 commit
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Eric Huang authored
It is to collaborate with HSA_CAPABILITY in libhsakmt. v2: squash in NULL pointer check Signed-off-by:
Eric Huang <JinhuiEric.Huang@amd.com> Reviewed-by:
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- 14 Jan, 2019 4 commits
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Felix Kuehling authored
dGPUs need their own topology devices. Don't assign them to APU topology devices with CPU cores. Bug: https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver/issues/66Signed-off-by:
Elias Konstantinidis <ekondis@gmail.com> Acked-by:
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Felix Kuehling authored
ifdef x86_64 specific code. Allow enabling CONFIG_HSA_AMD on ARM64. v2: Fixed a compiler warning due to an unused variable CC: Mark Nutter <Mark.Nutter@arm.com> Signed-off-by:
Mark Nutter <Mark.Nutter@arm.com> Acked-by:
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Felix Kuehling authored
dGPUs need their own topology devices. Don't assign them to APU topology devices with CPU cores. Bug: https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver/issues/66Signed-off-by:
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Felix Kuehling authored
ifdef x86_64 specific code. Allow enabling CONFIG_HSA_AMD on ARM64. v2: Fixed a compiler warning due to an unused variable CC: Mark Nutter <Mark.Nutter@arm.com> Signed-off-by:
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- 07 Dec, 2018 2 commits
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Felix Kuehling authored
This is used for interoperability between ROCm compute and graphics APIs. It allows importing graphics driver BOs into the ROCm SVM address space for zero-copy GPU access. The API is split into two steps (query and import) to allow user mode to manage the virtual address space allocation for the imported buffer. Acked-by:
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Felix Kuehling authored
top_dev->gpu is NULL for CPUs. Avoid dereferencing it if NULL. Acked-by:
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- 19 Nov, 2018 1 commit
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Gang Ba authored
Add Vega12 and Polaris12 device info and device IDs to KFD. Signed-off-by:
Gang Ba <gaba@amd.com> Reviewed-by:
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- 05 Nov, 2018 2 commits
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Amber Lin authored
Add amdgpu_amdkfd_ prefix to amdgpu functions served for amdkfd usage. v2: fix indentation Signed-off-by:
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Amber Lin authored
After amdkfd module is merged into amdgpu, KFD can call amdgpu directly and no longer needs to use the function pointer. Replace those function pointers with functions if they are not ASIC dependent. Signed-off-by:
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- 27 Sep, 2018 3 commits
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Shaoyun Liu authored
Add Vega20 device IDs, device info and enable it in KFD. Signed-off-by:
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Felix Kuehling authored
Also save the version in struct kfd_dev so we only need to query it once. Signed-off-by:
Philip Yang <Philip.Yang@amd.com> Signed-off-by:
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Eric Huang authored
Add the flags of properties according to Asic type and pcie capabilities. Signed-off-by:
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- 20 Sep, 2018 1 commit
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Yong Zhao authored
Because CRAT_CU_FLAGS_IOMMU_PRESENT was not set in some BIOS crat, we need to workaround this. For future compatibility, we also overwrite the bit in capability according to the value of needs_iommu_device. Acked-by:
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- 11 Sep, 2018 1 commit
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Shaoyun Liu authored
Thunk will generate the XGMI topology information when necessary with the hive_id for each specified device Signed-off-by:
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- 10 Apr, 2018 1 commit
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Felix Kuehling authored
* Report 64-bit doorbells as HSA_CAP_DOORBELL_TYPE_2_0 in topology * Report cache information in topology (duplicates GFXv8 info for now) * Add device info for Vega10 support in KFD Raven is not enabled at this time as it needs additional changes in DQM to work with a single SDMA engine. Signed-off-by:
Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by:
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- 15 Mar, 2018 1 commit
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Oak Zeng authored
Populate DRM render device minor in kfd topology Signed-off-by:
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- 09 Dec, 2017 5 commits
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Harish Kasiviswanathan authored
Some AMD motherboards without an APU have a broken CRAT table which causes KFD initialization failures or incorrect information about NUMA nodes, CPU cores or system memory. Ignore CRAT tables without GPUs and rely on KFD's code to create a CRAT table for the CPU. Signed-off-by:
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Ben Goz authored
This is needed for enabling a user-mode workaround for an AQL queue wrapping HW bug on Tonga. Signed-off-by:
Ben Goz <ben.goz@amd.com> Signed-off-by:
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Philip Cox authored
* Wrong value for max_waves_per_simd * Missing ATC capability bit Signed-off-by:
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Amber Lin authored
For hardware blocks whose performance counters are accessed via MMIO registers, KFD provides the support for those privileged blocks. IOMMU is one of those privileged blocks. Most performance counter properties required by Thunk are available at /sys/bus/event_source/devices/amd_iommu. This patch adds properties to topology in KFD sysfs for information not available in /sys/bus/event_source/devices/amd_iommu. They are shown at /sys/devices/virtual/kfd/kfd/topology/nodes/0/perf/iommu/ formatted as /sys/devices/virtual/kfd/kfd/topology/nodes/0/perf/<block>/<property>, i.e. /sys/devices/virtual/kfd/kfd/topology/nodes/0/perf/iommu/max_concurrent. For dGPUs, who don't have IOMMU, nothing appears under /sys/devices/virtual/kfd/kfd/topology/nodes/0/perf. Signed-off-by:
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Harish Kasiviswanathan authored
Generate and parse VCRAT tables for dGPUs in kfd_topology_add_device. Some information that isn't available in the CRAT table is patched into the topology after parsing. HSA_CAP_DOORBELL_TYPE_1_0 is dependent on the ASIC feature CP_HQD_PQ_CONTROL.SLOT_BASED_WPTR, which was not introduced in VI until Carrizo. Report HSA_CAP_DOORBELL_TYPE_PRE_1_0 on Tonga ASICs. v2: Added #include <linux/pci.h> to kfd_crat.c to make it compile Signed-off-by:
Jay Cornwall <Jay.Cornwall@amd.com> Signed-off-by:
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