- 30 May, 2017 40 commits
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Stefan Wahren authored
It doesn't make sense to use a signed variable for offset here, so fix it up. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Stefan Wahren authored
Currently the includes doesn't reflect the dependencies. So fix this up by removing all unnecessary entries and add the necessary ones explicit. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Bogdan Purcareata says: ==================== net: phy: Support managed Cortina phys So far, the Cortina family phys (CS4340 in this particular case) are only supported in fixed link mode (via fixed_phy_register). The generic 10G phy driver does not work well with the phylib state machine, when the phy is registered via of_phy_connect. This prohibits the user from describing the phy nodes in the device tree. In order to support this scenario, and to properly describe the board device tree, add a minimal Cortina driver that reads the status from the right register. With the generic 10G C45 driver, the kernel will print messages like: [ 0.226521] mdio_bus 8b96000: Error while reading PHY16 reg at 1.6 [ 0.232780] mdio_bus 8b96000: Error while reading PHY16 reg at 1.5 v3 -> v4: - Add trademark info. - Minor documentation entry consistency nit. v2 -> v3: - Add documentation entry. v1 -> v2: - Change approach for getting the phy_id from hacking get_phy_c45_ids to describing the device in the device tree via ethernet-phy-id. More patch version changes per individual patches. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Bogdan Purcareata authored
Add device tree description info for Cortina 10G phy devices. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Bogdan Purcareata authored
Add basic support for Cortina PHY drivers. Support only CS4340 for now. The phys are not compatible with IEEE 802.3 clause 22/45 registers. Implement proper read_status support. The generic 10G phy driver causes bus register access errors. The driver should be described using the "ethernet-phy-id" device tree compatible. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Yuval Mintz says: ==================== qed: DCBx and Attentions series The series contains 2 major components [& some odd bits]: - The first 3 patches are DCBx-related, containg missing bits in the implementation, correcting existing API and removing code no longer necessary. - Most of the remaining patches are interrupt/hw-attention related, adding some differeneces relating to QL41xxx and QL45xxx differences. While at it, they also remove a large chunk of unnecessary structure definitions. The series also contain a patch [#10] that was accidently missing from a previous series. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Mintz, Yuval authored
Improve PCI performance by adjusting padding sizes to match those of the host machine's cacheline. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mintz, Yuval authored
Parities might exhibit a flood behavior since we re-enable the attention line without preventing the parity from re-triggering the assertion. Mask the source in AEU until the parity would be handled. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mintz, Yuval authored
In strucuture reflecting the AEU hw block some entries represent multiple HW bits, and the associated name is in fact a pattern. Today, whenever such an attention would be asserted the resulted prints would show the pattern string instead of indicating which of the possible bits was set. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mintz, Yuval authored
There are 4 attention bits in AEU that have different meaning for QL45xxx and QL41xxx adapters. Instead of doing a massive infrastructure change in favor of these bits, we implement a point fix where only those four would change meaning dependent on the adapter involved. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mintz, Yuval authored
We have almost all the necessary information regarding attentions in the logic employed for taking register dumps. Add some more and get rid of the seperate implementation we have today for identifying & printing various attention sources. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mintz, Yuval authored
In case management firmware indicates a change in the used S-tag, propagate the configuration to HW and FW. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Mintz, Yuval authored
The QL41xxx adapters' PCI allows a single configuration for the MSI-x table size of all child VFs of a given PF. The existing code wouldn't cause the management firmware to set that value, meaning the VFs would retain the default MSI-x table size. Introduce a new scheme so that whenever a VF is enabled, driver would set the number of MSI-x to be the maximum over the various VFs' needs. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sudarsana Reddy Kalluru authored
Older firmware used by device didn't distinguish between RoCE and RoCE V2 from DCBx configuration perspective, and as a result we've used to take a the RoCE-related configuration and apply to it for both. Since we now support configuring each its own values, there's no reason to reflect [& configure] that both are using the same. Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sudarsana Reddy Kalluru authored
Instead of using a boolean value that propagates to FW configuration, use the proper firmware HSI values. Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sudarsana Reddy Kalluru authored
Some getters are not getting filled with the correct information regarding local DCBx. Fixes: 49632b58 ("qed: Add support for static dcbx.") Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
David Ahern says: ==================== net: another round of extack handling for routing This set focuses on passing extack through lwtunnel and MPLS with additional catches for IPv4 route add and minor cleanups in MPLS encountered passing the extack arg around. v2 - mindful of bloat adding duplicate messages + refactored prefix and prefix length checks in ipv4's fib_table_insert and fib_table_del + refactored label check in mpls - split mpls cleanups into 2 patches + move nla_get_via up in af_mpls to avoid forward declaration ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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David Ahern authored
err is initialized to EINVAL and not used before it is set again. Remove the unnecessary initialization. Signed-off-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David Ahern authored
nla_get_via is only used in af_mpls.c. Remove declaration from internal.h and move up in af_mpls.c before first use. Code move only; no functional change intended. Signed-off-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David Ahern authored
Add error messages for failures in adding and deleting mpls routes. This covers most of the annoying EINVAL errors. Signed-off-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David Ahern authored
mpls_route_add and mpls_route_del have the same checks on the label. Move to a helper. Avoid duplicate extack messages in the next patch. Signed-off-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David Ahern authored
Fill in extack for errors in build_state for mpls lwt encap including passing extack to nla_get_labels and adding error messages for failures in it. Signed-off-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David Ahern authored
Pass extack arg down to lwtunnel_build_state and the build_state callbacks. Add messages for failures in lwtunnel_build_state, and add the extarg to nla_parse where possible in the build_state callbacks. Signed-off-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David Ahern authored
Pass extack down to lwtunnel_valid_encap_type and lwtunnel_valid_encap_type_attr. Add messages for unknown or unsupported encap types. Signed-off-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David Ahern authored
Add extack error message for invalid prefix length and invalid prefix. Example of the latter is a route spec containing 172.16.100.1/24, where the /24 mask means the lower 8-bits should be 0. Amazing how easy that one is to overlook when an EINVAL is returned. Signed-off-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David Ahern authored
fib_table_insert and fib_table_delete have the same checks on the prefix and length. Refactor into a helper. Avoids duplicate extack messages in the next patch. Signed-off-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Jakub Kicinski says: ==================== nfp: pci core, hwmon, live mac addr change This series brings updates to core PCI code, SR-IOV, exposes firmware's capability to change MAC address at runtime and HWMON interfaces. The PCI code updates include resiliency improvement in conditions which are quite unusual, but still shouldn't make the driver oops. We also handle very large device memory operation more gracefully. A timeout is added to acquiring mutexes in device memory. Pablo provides a patch to expose to the stack the ability to change MAC addresses under traffic while David adds HWMON interface for reading device temperature and power consumption. Last three patches are minor improvements to the netdev code. v2: - add patch 1 - fix for devlink build; - fix build issue with the hwmon patch. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
We only kick RX free buffer queue controller every NFP_NET_FL_BATCH (currently 16) entries. This means that we will always kick the QC when write ring index is divisable by NFP_NET_FL_BATCH. There is no need to keep counts. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
Adding ring size to index calculation is pointless, since index will be masked with ring size - 1. Suggested-by: David Laight <David.Laight@ACULAB.COM> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
Ring pointers are unsigned. Fix the print formats to avoid showing users negative values. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
There is currently no timeout to the resource and lock acquiring loops. We printed warnings and depended on user sending a signal to the waiting process to stop the waiting. This doesn't work very well when wait happens out of a work queue. The simplest example of that is PCI probe. When user loads the module and card is in a broken state modprobe will wait forever and signals sent to it will not actually reach the probing thread. Make sure all wait loops have a time out. Set the upper wait time to 60 seconds to stay on the safe side. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David Brunecz authored
Add support for retrieving temperature and power sensor and limits via NSP. Signed-off-by: David Brunecz <david.brunecz@netronome.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
We want to support extendable commands, where newer versions of the management FW may provide more information. Zero out the communication buffer before passing control to NSP. This way if management FW is old and only fills in first N bytes, the remaining ones will be zeros which extended ABI fields should reserve as not supported/not available. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
We currently print reserved BAR mappings info as we create them. This makes the probe logs longer than necessary. Print into a buffer instead and log all the info as a single line. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
nfp_cpp_{read,write}() helpers perform device memory mapping (setting the PCIe -> NOC translation BARs) and accessing it. They, however, currently implicitly expect that the length of entire operation will fit in one BAR translation window. There is a number of 16MB windows available, and we don't really need to access such large areas today. If the user, however, manages to trick the driver into making a big mapping (e.g. by providing a huge fake FW file), the driver will print a warning saying "No suitable BAR found for request" and a stack trace - which most users find concerning. To be future-proof and not scare users with warnings, make the nfp_cpp_{read,write}() helpers do accesses chunk by chunk if the area size is large. Set the notion of "large" to 2MB, which is the size of the smallest BAR window. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
For accessing PCIe ctrl memory we depend on the BAR aperture being large enough to reach all registers. Since the BAR aperture can be set in the flash make sure the driver won't oops the kernel when the PCIe configuration is unusual. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
If ioremap of PCIe ctrl memory failed we can still get to it through PCI config space, therefore we allow ioremap() to fail. When if fails, however, we must leave all the IOMEM pointers as NULL. Currently we would calculate csr and em pointers, adding offsets to the potential NULL value and therefore making the NULL-checks throughout the code ineffective. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
PCI subsystem has support for drivers limiting the number of VFs available below what the IOV capability claims. Make use of it. While at it remove the #ifdef/#endif on CONFIG_PCI_IOV, it was there to avoid unnecessary warnings in case device read failed but kernel doesn't have SR-IOV support anyway. Device reads should not fail. Note that we still need the driver-internal check for the case where max VFs is 0 since PCI subsystem treats 0 as limit not set. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Pablo Cascón authored
Expose FW app ability to change MAC address at runtime. Make sure we only depend on it if FW app advertised the right capability. Signed-off-by: Pablo Cascón <pablo.cascon@netronome.com> Reviewed-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jakub Kicinski authored
Fix build with DEVLINK=m and NFP=y. Fixes: 1851f93f ("nfp: add devlink support") Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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