This commit adds support for UniPhier outer cache controller.
All the UniPhier SoCs are equipped with the L2 cache, while the L3
cache is currently only integrated on PH1-Pro5 SoC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'samsung-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc

Samsung SoC updates for v4.4

- use PWM lookup table with pwm_add_table() for the following boards
  : s3c24xx h1940 and rx1950
  : s3c64xx smdk6410, crag6410, hmt and smartq
- document: update bootloader interface on exynos542x

* tag 'samsung-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  Documentation: EXYNOS: Update bootloader interface on exynos542x
  ARM: S3C64XX: Use PWM lookup table for mach-smartq
  ARM: S3C64XX: Use PWM lookup table for mach-hmt
  ARM: S3C64XX: Use PWM lookup table for mach-crag6410
  ARM: S3C64XX: Use PWM lookup table for smdk6410
  ARM: S3C24XX: Use PWM lookup table for mach-rx1950
  ARM: S3C24XX: Use PWM lookup table for mach-h1940
Signed-off-by: Olof Johansson <olof@lixom.net>

mvebu soc for 4.4 (part 2)

- Use mac_pton() helper in the oropn5x board instead of duplicating it
- Add the broken-idle option allowing to boot boards with a mistake in
  the hardware design

* tag 'mvebu-soc-4.4-2' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: add broken-idle option
  ARM: orion5x: use mac_pton() helper
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'tegra-for-4.4-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc

ARM: tegra: Core SoC changes for v4.4-rc1

A single patch to restore rfkill support on AC100.

* tag 'tegra-for-4.4-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: paz00: use con_id's to refer GPIO's in gpiod_lookup table
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'at91-ab-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/soc

More SoC changes for 4.4:
 - a great fix for PM/suspend/resume

* tag 'at91-ab-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
  ARM: at91: pm: at91_pm_suspend_in_sram() must be 8-byte aligned
Signed-off-by: Olof Johansson <olof@lixom.net>

Update the documentation about:
1. Usage of PMU_SPARE2 register.
   Bootloaders on Exynos542x-based boards often use the register
   PMU_SPARE2 (0x908) in the same way as on Exynos3250: as a indicator
   the secondary CPU was booted on. The bootloader will set this value
   to non-zero, after sucessfull power up of secondary CPU. In the same
   time this booted CPU will stuck (spin) waiting for software reset.
2. Exynos542x entry address for secondary CPU boot up after system
   suspend (with MCPM enabled and in non-secure mode).

See arch/arm/mach-exynos/mcpm-exynos.c for source code.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>

Merge tag 'imx-soc-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc

The i.MX SoC updates for 4.4:
 - Enable suspend and cpufreq support for i.MX6UL
 - Add platform level ENET initialization support for i.MX7D

* tag 'imx-soc-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx: add cpufreq device for imx6ul
  ARM: imx: add enet init for i.MX7D platform
  ARM: imx7d: add imx7d iomux-gpr field define
  ARM: imx: add suspend/resume support for i.mx6ul
Signed-off-by: Olof Johansson <olof@lixom.net>

Do the initial setting of the pmic wrap interrupt before requesting the interrupt.
This fixes the corner-case where the pmic is initialized by the bootloader, but
not the pmic watchdog.

Add support for active wakeup to the scpsys. This allows to keep the power of
a scpsys domain  during suspend state.

With version v4.3 new subsystem clocks are added to the clock dirver. In late
init the kernel turns off all unused clocks. This can provoke a hang if
the kernel tries to access the venc and venc_lt power domain registers.
Add the necessary parent clocks for this power domains to
the scpsys so that no random hang happens.

The bootloader of mt6589, mt8135 and mt1827 does not turn on the arm-arch-timer.
As there is no opensource bootloader in the near future for this architectures
we enable the arch timer at kernel boot. We need the arch timer for SMP boot.

Add support for SMP on mt6589, mt8127 and mt8135.

* tag 'v4.3-next-soc' of https://github.com/mbgg/linux-mediatek:
  ARM: mediatek: add smp bringup code
  ARM: mediatek: enable gpt6 on boot up to make arch timer working
  soc: mediatek: Fix random hang up issue while kernel init
  soc: mediatek: add scpsys support active_wakeup
  soc: mediatek: Move the initial setting of pmic wrap interrupt before requesting irq.
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'sunxi-core-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc

Allwinner core changes for 4.4

Add support for the Allwinner R8 SoC used in the CHIP.

* tag 'sunxi-core-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  ARM: sunxi: Add R8 support
Signed-off-by: Olof Johansson <olof@lixom.net>

The broken-idle option can be activated from the coherency-fabric DT
node. This property allows to disable the idle capability, when the
hardware doesn't support it, like the Seagate Personal Cloud boards.
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Instead of custom approach let's use generic helper function.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Detlef Vollmann <dv@vollmann.ch>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Tested-by: Detlef Vollmann <dv@vollmann.ch> #on DNS-323
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

fncpy() requires that the source and the destination are both 8-byte
aligned.
Signed-off-by: Patrick Doyle <pdoyle@irobot.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Fixes: d94e688c ("ARM: at91/pm: move the copying the sram function to the sram initialization phase")
Cc: <stable@vger.kernel.org> # 4.1+

The R8 is a new Allwinner SoC based on the A13. While both are very
similar, there's still a few differences. Introduce a new compatible to
deal with them.

In order to have a consistent naming, instead of mentioning the Allwinner
A series as the machine name, switch to sun4i/sun5i like what is done for
the other families.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>

Merge tag 'berlin-soc-for-4.4-2' of git://git.infradead.org/users/hesselba/linux-berlin into next/soc

Merge "Marvell Berlin SoC for 4.4 take 2" from Sebastian Hesselbarth:

- use the non-self-clearing reset register
- add cpu hotplug support

* tag 'berlin-soc-for-4.4-2' of git://git.infradead.org/users/hesselba/linux-berlin:
  arm: berlin: add CPU hotplug support
  arm: berlin: use non-self-cleared reset register to reset cpu

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'keystone-driver-soc_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/soc

Merge "ARM Keystone SOC driver updates for 4.4" from Santosh Shilimkar:

	Documentation and support to be able to load the PDSP
	firmware necessary for accumulator operation.

* tag 'keystone-driver-soc_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  soc: ti: qmss: make acc queue support optional in the driver
  soc: ti: add firmware file name as part of the driver
  Documentation: dt: soc: Add description for knav qmss driver

Merge "Broadcom soc changes for v4.4 (try 2)" from Florian Fainelli:

This pull request contains the following Broadcom SoC platform and driver changes:

- Brian Norris create a drivers/soc/brcmstb/ stub as a place holder for SoC-specific
  code which is coming next

- Florian Fainelli adds support for configuring the BCM7xxx SoCs Bus Interface Unit
  with their specific write-pairing setting, which must be saved and restored during
  system-wide suspend/resume, and consequently updates the brcmstb machine code to
  initialize the BIU

- Jon Mason adds support for the Northstar Plus SoCs by introducing a custom machine
  descriptor matching their compatible string and setting up the PL310 L2 cache and
  enabling the relevant ARM errata for their Cortex-A9

* tag 'arm-soc/for-4.4/soc' of http://github.com/Broadcom/stblinux:
  ARM: brcmstb: Setup BIU control registers during boot
  soc: brcmstb: Add Bus Interface Unit control setup
  soc: add stubs for brcmstb SoC's
  ARM: NSP: Add basic support for Broadcom Northstar Plus SoC

Merge tag 'berlin-soc-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/soc

Merge "Marvell SoC for 4.4 take 1" from Sebastian Hesselbarth:
- register cpufreq-dt device

* tag 'berlin-soc-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin:
  ARM: berlin: register cpufreq-dt

Merge tag 'berlin64-soc-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/soc

Merge "Marvell Berlin ARM64 SoC for 4.4 take 1" from Sebastian Hesselbarth:
- enable ARCH_REQUIRE_GPIOLIB for DW GPIO driver

* tag 'berlin64-soc-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin:
  arm64: berlin: enable ARCH_REQUIRE_GPIOLIB

Merge "mvebu soc for 4.4 (part 1)" from Gregory CLEMENT:

L2 caches optimization for Armada XP

* tag 'mvebu-soc-4.4-1' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: add support to clear shared L2 bit on Armada XP

Add cpu hotplug support for berlin SoCs such as BG2 and BG2Q. These SoC
don't support power off cpu independently, but we also want cpu hotplug
support in these SoCs. We achieve this goal by putting the dying CPU in
WFI state after the coherency is disabled, then asserting the dying CPU
reset bit to put the CPU in reset state.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

In Berlin SoCs, there are two kinds of cpu reset control registers: the
first one's corresponding bits will be self-cleared after some cycles,
while the second one's bits won't. Previously the first kind of reset
control register is used, this patch uses the second kind one to prepare
for the next hotplug commit.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

Add support for booting secondary CPUs on mt6589, mt8127
and mt8135.
Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

We enable GTP6 which ungates the arch timer clock.
In the future this should be done in the bootloader.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>

In kernel late init, it turns off all unused clocks, which
needs to access subsystem registers such as VENC and VENC_LT.

Accessing MT8173 VENC registers needs two top clocks, mm_sel and
venc_sel. Accessing VENC_LT registers needs mm_sel and venclt_sel.
So we need to keep these clocks on before accessing their registers.

This patch keeps venc_sel / venclt_sel clock on when
VENC / VENC_LT's power is on, to prevent system hang up while
accessing its registeres.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

acc channels are available only if accumulator PDSP is loaded and
running in the SoC. As this requires firmware and user may not have
firmware in the file system, make the accumulator queue support
available in qmss driver optional. To use accumulator queus user needs
to add firmware to the file system and boot up kernel.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>

Currently firmware file name is included in the DTS. This is not scalable
as user has to change the DTS if they need upgrade to a new firmware.
Instead, add the firmware file name in the driver itself. As long as there
is no API change, new firmware upgrade is easy and require no driver
change. User is expected to copy the firmware image to the file system
and add a sym link to the new firmware for doing an upgrade. Driver add
a array of firmware file names to search for the available firmware blobs.
This scheme also prepare the driver for future changes to API if ever
happens. In such case it is assumed that driver needs to change to
accommodate the new firmware and new firmware file name will get added to
the array.

Also update the DT document to remove the firmware attribute and add
description about firmware in the driver documentation.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>

Add documentation for knav qmss driver.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>

Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>

Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>

Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>

Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>

Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>

Use a PWM lookup table to provide the PWM to the pwm-backlight device.
The driver has a legacy code path that is required only because boards
still use the legacy method of requesting PWMs by global ID. Replacing
these usages allows that legacy fallback to be removed.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>

Add cpufreq device for i.MX6UL. Using the common
cpufreq of i.MX6 SOC.
Signed-off-by: Bai Ping <b51503@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Call brcmstb_biuctrl_init() in brcmstb's init_irq machine descriptor
callback since we need to setup the Bus Interface Unit before SMP in
particular, but we also need to be able to remap registers.
Acked-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Broadcom STB SoCs (brcmstb) require an early setup of their Bus
Interface Unit control register, this needs to happen before SMP is
brought up because it affects how the CPU complex will be interfaced to
the memory controller.

Add support code which properly initializes the BIU registers based on
whether "brcm,write-pairing" is present in Device Tree, and take care of
saving and restoring credit register settings during system-wide
suspend/resume operations.
Acked-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'at91-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/soc

Merge "First little batch of SoC changes for 4.4" from Nicolas Ferre:

- a MAINTAINER addition to cover SAMA5 SoCs
- removal of one unneeded header file
- for low-level serial output, use the DEBUG_UART_PHYS

* tag 'at91-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
  ARM: at91: debug: use DEBUG_UART_PHYS
  ARM: at91: remove useless includes in platform_data/atmel.h
  MAINTAINERS: explicitly add Atmel SAMA5

Merge tag 'renesas-soc-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Merge "Renesas ARM Based SoC Updates for v4.4" from Simon Horman:

* ARM: shmobile: R-Mobile: Use CPG/MSTP Clock Domain attach/detach helpers

  This part of a multi-stage effort by Geert Uytterhoeven to add:

  "Clock Domain support to the Clock Pulse Generator (CPG) Module Stop
   (MSTP) Clocks driver using the generic PM Domain, to be used on shmobile
   SoCs without device power domains (R-Car Gen1 and Gen2, RZ).  This allows
   to power-manage the module clocks of SoC devices that are part of the
   CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume,
   similar to SoCs with device power domains (SH-Mobile and R-Mobile)."

* tag 'renesas-soc-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: R-Mobile: Use CPG/MSTP Clock Domain attach/detach helpers
  clk: shmobile: mstp: Consider "zb_clk" suitable for power management