- 20 Mar, 2009 6 commits
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Steve Glendinning authored
Polaris is an SMSC reference platform with a SH7709S CPU and LAN9118 ethernet controller. This patch adds support for it. Updated following feedback from Nobuhiro Iwamatsu. Signed-off-by:
Steve Glendinning <steve.glendinning@smsc.com> Reviewed-by:
Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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Rafael Ignacio Zurita authored
Rework the hd64461 demuxer code to fix the HD64461 level-triggered interrupts handling, using handle_level_irq() as needed. Signed-off-by:
Rafael Ignacio Zurita <rizurita@yahoo.com> Signed-off-by:
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Magnus Damm authored
Flag that the SuperH RTC supports wakeup. Signed-off-by:
Magnus Damm <damm@igel.co.jp> Signed-off-by:
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Magnus Damm authored
This patch modifies invalid time handling in the SuperH RTC driver. Instead of zeroing the returned value at read-out time we just return an error code and reset invalid values during probe. Signed-off-by:
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Magnus Damm authored
This patch modifies the SuperH RTC driver to only enable carry interrupts when needed. So by default no interrupts are enabled with this patch. Without this patch a suspending system will most likely wake up by the carry interrupt regardless if the alarm interrupt has been enabled or not. Signed-off-by:
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Magnus Damm authored
Older versions of kexec-tools has a zImage loader that passes a virtual address as entry point. The elf loader otoh it passes a physical address as entry point, and pages are always passed as physical addresses as well. Only allow physical addresses from now on. Signed-off-by:
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- 18 Mar, 2009 5 commits
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Paul Mundt authored
Save and restore ftrace state when returning from kexec jump in machine_kexec(). Follows the x86 change. Signed-off-by: -
Paul Mundt authored
For the time being, this creates far more problems than it solves, evident by the second local_irq_disable(). Kill all of this off and rely on IRQ disabling to protect against the VBR reload. Signed-off-by: -
Magnus Damm authored
Add kexec jump support to the SuperH architecture. Similar to the x86 implementation, with the following exceptions: - Instead of separating the assembly code flow into two parts for regular kexec and kexec jump we use a single code path. In the assembly snippet regular kexec is just kexec jump that never comes back. - Instead of using a swap page when moving data between pages the page copy assembly routine has been modified to exchange the data between the pages using registers. - We walk the page list twice in machine_kexec() to do and undo physical to virtual address conversion. Signed-off-by:
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Magnus Damm authored
Rework the kexec code to avoid using P2SEG. Instead we walk the page list in machine_kexec() and convert the addresses from physical to virtual using C. Signed-off-by:
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Magnus Damm authored
Setup the vbr register in machine_kexec(). This instead of passing values to the assembly snippet. Signed-off-by:
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- 17 Mar, 2009 8 commits
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Paul Mundt authored
This follows the ARM change from Aaro Koskinen: When unmapping N pages (e.g. shared memory) the amount of TLB flushes done can be (N*PAGE_SIZE/ZAP_BLOCK_SIZE)*N although it should be N at maximum. With PREEMPT kernel ZAP_BLOCK_SIZE is 8 pages, so there is a noticeable performance penalty when unmapping a large VMA and the system is spending its time in flush_tlb_range(). The problem is that tlb_end_vma() is always flushing the full VMA range. The subrange that needs to be flushed can be calculated by tlb_remove_tlb_entry(). This approach was suggested by Hugh Dickins, and is also used by other arches. The speed increase is roughly 3x for 8M mappings and for larger mappings even more. Bits and peices are taken from the ARM patch as well as the existing arch/um implementation that is quite similar. The end result is a significant reduction in both partial and full TLB flushes initiated through flush_tlb_range(). At the same time, the nommu implementation was broken, had a superfluous cache flush, and subsequently would have triggered a BUG_ON() if a code-path had triggered it. Tidy this up for correctness and provide a nopped-out implementation there. More background on the initial discussion can be found at: http://marc.info/?t=123609820900002&r=1&w=2 http://marc.info/?t=123660375800003&r=1&w=2Signed-off-by:
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Paul Mundt authored
Signed-off-by: -
Paul Mundt authored
While harmless, PTEA has different semantics on these parts, and is only used in extended TLB mode. Kill off the legacy support. Signed-off-by: -
Paul Mundt authored
This adds support for extended ASIDs (up to 16-bits) on newer SH-X3 cores that implement the PTAEX register and respective functionality. Presently only the 65nm SH7786 (90nm only supports legacy 8-bit ASIDs). The main change is in how the PTE is written out when loading the entry in to the TLB, as well as in how the TLB entry is selectively flushed. While SH-X2 extended mode splits out the memory-mapped U and I-TLB data arrays for extra bits, extended ASID mode splits out the address arrays. While we don't use the memory-mapped data array access, the address array accesses are necessary for selective TLB flushes, so these are implemented newly and replace the generic SH-4 implementation. With this, TLB flushes in switch_mm() are almost non-existent on newer parts. Signed-off-by: -
Nobuhiro Iwamatsu authored
IRQ for sh_eth of sh7763rdp became multi handling. Therefore, the IRQ number of sh_eth is changed, too. Signed-off-by:
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Nobuhiro Iwamatsu authored
This adds support for the ESPT-Giga (Ethernet Serial Parallel Translator) SH7763-based reference board. Board support is relatively sparse, presently supporting serial, gigabit ethernet, USB host, and MTD. More information (in Japanese) available at: http://www.cente.jp/product/cente_hard/ESPT-Giga.htmlSigned-off-by:
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Paul Mundt authored
Follow the PVR2 DMAC change for G2 DMA. Signed-off-by: -
Paul Mundt authored
With arch/sh/drivers/dma/ always being built, the Dreamcast DMA engines are being unconditionally built in, regardless of whether the DMA API is enabled or not. This is a regression from previous behaviour, but there is not much advantage in building them all in unconditionally regardless. Add a new config option to make it optional, and update the only user of it to reflect that. Signed-off-by:
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- 16 Mar, 2009 11 commits
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Nobuhiro Iwamatsu authored
When SuperH CPU has IRQ multi of DMAC, SH_DMA_IRQ_MULTI becomes enable. The following CPU's are Multi IRQ of DMAC now. - SH775X and SH7091 - SH776X - SH7780 - SH7785 If SH_DMA_IRQ_MULTI becomes enable, dma-sh api driver is optimized for Multi IRQ. Signed-off-by:
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Francesco VIRLINZI authored
This patch fixes a possible problem in the resume from hibenration. It temporaneally saves the clk->rate on the stack to avoid any possible change during the clk->set_parent(..) call. Signed-off-by:
Francesco Virlinzi <francesco.virlinzi@st.com> Signed-off-by:
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Paul Mundt authored
Signed-off-by: -
Magnus Damm authored
This patch adds suspend/resume support to the LCDC driver for SuperH Mobile - sh_mobile_lcdcfb. We simply stop hardware on suspend and start it again on resume. For RGB panels this is trivial, but for SYS panels in deferred io mode this becomes a bit more difficult - we need to wait for a frame end interrupt to make sure the clocks are balanced before stopping the actual hardware. Signed-off-by:
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Magnus Damm authored
Improve the ap325 board code to allow the lcd panel and backlight to be powered off. Signed-off-by:
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Magnus Damm authored
This patch contains CONFIG_SUSPEND support to the SuperH architecture. If enabled, SuperH Mobile processors will register their suspend callbacks during boot. To suspend, use "echo mem > /sys/power/state". To allow wakeup, make sure "/sys/device/platform/../power/wakeup" contains "enabled". Additional per-device driver patches are most likely needed. Signed-off-by:
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Nobuhiro Iwamatsu authored
-- log -- arch/sh/kernel/cpu/sh4/../sh3/entry.S:365: Error: invalid operands for opcode make[4]: *** [arch/sh/kernel/cpu/sh4/../sh3/entry.o] Error 1 make[3]: *** [arch/sh/kernel/cpu/sh4] Error 2 -- log -- Signed-off-by:
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Nobuhiro Iwamatsu authored
dma-sh's get_dma_error_irq() is only used by SH4, as the SH3 doesn't have the DMA Error interrupt. Disable it out for non-SH4 builds. Signed-off-by:
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Francesco VIRLINZI authored
This implements preliminary suspend/resume support for the PMB. Signed-off-by:
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Nobuhiro Iwamatsu authored
Signed-off-by:
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Kuninori Morimoto authored
Signed-off-by:
Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by:
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- 11 Mar, 2009 4 commits
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Magnus Damm authored
Improve the sh7785lcr power off implementation to never return. It takes some time before the board is actually powered off, just hang after asking the harware to power down. This removes the serial port garbage printout. Signed-off-by:
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Magnus Damm authored
This patch changes sh_keysc to use to_platform_device() for suspend. Thanks to Trilok Soni for this suggestion. Signed-off-by:
Trilok Soni <soni.trilok@gmail.com> Signed-off-by:
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Francesco VIRLINZI authored
This patch adds PM support to the clock framework. With this, resume from hibernation is properly supported. Signed-off-by:
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Francesco VIRLINZI authored
This patch adds the clk_set_parent/clk_get_parent routines to the sh clock framework. Signed-off-by:
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- 10 Mar, 2009 6 commits
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Adrian McMenamin authored
This patch adds support for the Sega Dreamcast visual memory unit as a flash mapping. It requires changes in the maple bus driver (posted separately) to support block reads and writes. The VMU is a 'smart' flash device, with a built-in 8-bit controller - for instance there is an erase before a write but it is hidden from the user. But the device's overall behaviour means it works well with the mtd layer and it is appropriate to add it as an mtd mapping. Signed-off-by:
Adrian McMenamin <adrian@mcmen.demon.co.uk> Acked-By:
David Woodhouse <David.Woodhouse@intel.com> Signed-off-by:
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Nobuhiro Iwamatsu authored
This adds DMA support for newer SH-4A CPUs, particularly SH7763/64/80/85. This also enables multi IRQ support for platforms that have multiple vectors bound to the same IRQ source. Signed-off-by:
Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by:
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Paul Mundt authored
Signed-off-by: -
Paul Mundt authored
Signed-off-by: -
Yoshihiro Shimoda authored
Fix the problem that cannot work a PCI device when 32-bit physical address mode. Signed-off-by:
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Yoshihiro Shimoda authored
Add a new defconfig for SH7785LCR in 32-bit mode, and update the power off code to avoid 29-bit assumptions. Signed-off-by:
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