- 16 Apr, 2005 40 commits
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Andi Kleen authored
It was confusingly named. Signed-off-by:
Andi Kleen <ak@suse.de> DESC x86_64: Switch SMP bootup over to new CPU hotplug state machine EDESC From: "Andi Kleen" <ak@suse.de> This will allow hotplug CPU in the future and in general cleans up a lot of crufty code. It also should plug some races that the old hackish way introduces. Remove one old race workaround in NMI watchdog setup that is not needed anymore. I removed the old total sum of bogomips reporting code. The brag value of BogoMips has been greatly devalued in the last years on the open market. Real CPU hotplug will need some more work, but the infrastructure for it is there now. One drawback: the new TSC sync algorithm is less accurate than before. The old way of zeroing TSCs is too intrusive to do later. Instead the TSC of the BP is duplicated now, which is less accurate. Cc: <rusty@rustcorp.com.au> Cc: <mingo@elte.hu> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Andi Kleen authored
Add acpi_skip_timer_override option. It was missing previously. Signed-off-by:
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Andi Kleen authored
Exceptions and hardware interrupts can, to a certain degree, nest, so when attempting to follow the sequence of stacks used in order to dump their contents this has to be accounted for. Also, IST stacks have their tops stored in the TSS, so there's no need to add the stack size to get to their ends. Minor changes from AK. Signed-off-by:
Jan Beulich <jbeulich@novell.com> Signed-off-by:
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Andi Kleen authored
Clean up the code greatly. Now uses the infrastructure from the Intel dual core patch Should fix a final bug noticed by Tyan of not detecting the nodes correctly in some corner cases. Patch for x86-64 and i386 Signed-off-by:
Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by:
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Andi Kleen authored
Appended patch adds the support for Intel dual-core detection and displaying the core related information in /proc/cpuinfo. It adds two new fields "core id" and "cpu cores" to x86 /proc/cpuinfo and the "core id" field for x86_64("cpu cores" field is already present in x86_64). Number of processor cores in a die is detected using cpuid(4) and this is documented in IA-32 Intel Architecture Software Developer's Manual (vol 2a) (http://developer.intel.com/design/pentium4/manuals/index_new.htm#sdm_vol2a) This patch also adds cpu_core_map similar to cpu_sibling_map. Slightly hacked by AK. Signed-off-by:Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by:
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Andi Kleen authored
Signed-off-by:
Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by:
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Andi Kleen authored
Calling a notifier three times in the debug handler does not make much sense, because a debugger can figure out the various conditions by itself. Remove the additional calls to DIE_DEBUG and DIE_DEBUGSTEP completely. This matches what i386 does now. This also makes sure interrupts are always still disabled when calling a debugger, which prevents: BUG: using smp_processor_id() in preemptible [00000001] code: tpopf/1470 caller is post_kprobe_handler+0x9/0x70 Call Trace:<ffffffff8024f10f>{smp_processor_id+191} <ffffffff80120e69>{post_kpro be_handler+9} <ffffffff80120f7a>{kprobe_exceptions_notify+58} <ffffffff80144fc0>{notifier_call_chain+32} <ffffffff80110daf>{do_debug+335} <ffffffff8010f513>{debug+127} <EOE> on preemptible debug kernels with kprobes when single stepping in user space. This was probably a bug even on non preempt kernels, this function was supposed to be running with interrupts off according to a comment there. Note to third part debugger maintainers: please double check your debugger can still single step. Cc: <prasanna@in.ibm.com> Cc: <jbeulich@novell.com> Cc: <kaos@sgi.com> Cc: <jim.houston@ccur.com> Cc: <jfv@bluesong.net> Signed-off-by: -
Andi Kleen authored
This might save memory on some Opteron systems without AGP bridge. Signed-off-by:
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Andi Kleen authored
Look for gaps in the e820 memory map to put PCI resources in. This hopefully fixes problems with the PCI code assigning 32bit BARs MMIO resources which are >32bit. Signed-off-by:
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Siddha, Suresh B authored
We need to use the size_and_mask in set_mtrr_var_ranges(which is called while programming MTRR's for AP's Signed-off-by:
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Andi Kleen authored
It doesn't make sense to only do this only for AMD K8. This would support future CPUs with extended address spaces properly. For i386 and x86-64 Cc: <davej@redhat.com> Signed-off-by:
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Andi Kleen authored
Remove excessive stack allocation in MCE code with large NR_CPUS Signed-off-by:
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Andi Kleen authored
They are rumoured to be much more reliable than the RIP in the stack frame on P4s. This is a borderline case because the code is very simple. Please note there are no plans to add support for all the MCE register MSRs. Cc: <venkatesh.pallipadi@intel.com> Cc: <racing.guo@intel.com> Signed-off-by:
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Andi Kleen authored
local_t is actually a win over atomic_t because it does not need lock prefixes. Signed-off-by:
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Andi Kleen authored
The NMI watchdog code did this incorrectly Signed-off-by:
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Andi Kleen authored
There were no reports about the previous warning for FPU exceptions in the kernel, so make it a die() now. Also improve the error messages slightly. Signed-off-by:
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Andi Kleen authored
On Intel Noconas the TSC ticks with a constant frequency. Don't scale the factor used by udelay when cpufreq changes the frequency. This generalizes an earlier patch by Intel for this. Cc: <venkatesh.pallipadi@intel.com> Signed-off-by:
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Andi Kleen authored
Remove unused macro in preempt support Signed-off-by:
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Andi Kleen authored
Could lead to a lost reschedule event when the process already rescheduled on exception exit, and needs it again while still being in the kernel. Unlikely case though. Also remove one redundant cli in another entry.S path. Signed-off-by:
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Andi Kleen authored
This fixes various issues in the return path for "paranoid" handlers (= running on a private exception stack that act like NMIs). Generalize previous hack to switch back to process stack for scheduling/signal handling purposes. Signed-off-by:
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Andi Kleen authored
This removes some unnecessary code in the assembly files. Matches i386 behaviour. In addition don't clear the work check mask after work has been done. This fixes some theoretical signal/other event losses. Signed-off-by:
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Andi Kleen authored
Minor microoptimization in syscall entry slow path Signed-off-by:
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Andi Kleen authored
Ported from i386/Linus Fix another TF corner case. Need to do the special TF handling for all signals to make debuggers happy Signed-off-by:
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Andi Kleen authored
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Andi Kleen authored
To avoid some code duplication. Signed-off-by:
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Andi Kleen authored
Ported from i386/Linus Still won't handle other TF changing instructions like IRET or LAHF. Prefix handling must be double checked... Signed-off-by:
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Andi Kleen authored
Ported from i386/Linus Be more careful with TF handling to fix some copy protection codes in Wine Signed-off-by:
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Andi Kleen authored
Ported from i386 (originally from Linus) clean up ptrace single-stepping, make PT_DTRACE exact. (This makes the naming of "DTRACE" purely historical, since on x86 it now means "single step in progress"). Signed-off-by:
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Andi Kleen authored
This allows to use them on x86-64 Signed-off-by:
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Andi Kleen authored
Use a real VMA to map the 32bit vsyscall page This interacts better with Hugh's upcomming VMA walk optimization Also removes some ugly special cases. Code roughly modelled after the ppc64 vdso version from Ben Herrenschmidt. Signed-off-by:
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akpm@osdl.org authored
I had strange NMI watchdog timeouts running sysrq-T across 9600-baud serial. Signed-off-by:
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Jason Davis authored
x86_64 genapic mechanism should be aware of machines that use physical APIC mode regardless of how many clusters/processors are detected. ACPI 3.0 FADT makes this determination very simple by providing a feature flag "force_apic_physical_destination_mode" to state whether the machine unconditionally uses physical APIC mode. Unisys' next generation x86_64 ES7000 will need to utilize this FADT feature flag in order to boot the x86_64 kernel in the correct APIC mode. This patch has been tested on both x86_64 commodity and ES7000 boxes. Signed-off-by:
Jason Davis <jason.davis@unisys.com> Acked-by:
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Andi Kleen authored
Port over a i386 kludge from rusty to x86-64 I don't think it is a full solution, but the upcomming smp bootup rewrite will solve it. This fixes BUGs at bootup on bigger x86-64 systems. Signed-off-by:
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Andi Kleen authored
Use the correct file name in BUG() Signed-off-by:
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Andi Kleen authored
Only display physical id/siblings when there are siblings or dual core. In 2.6.11 I accidentially broke it and it was always displaying these fields But for compatibility to all these /proc parsers around it is better to do it in the old way again. Noticed by Suresh Siddha Cc: <Suresh.b.siddha@intel.com> Signed-off-by:
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Roland McGrath authored
Use the i386 PT_NOTE segment in x86_64 as well. Signed-off-by:
Roland McGrath <roland@redhat.com> Signed-off-by:
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Roland McGrath authored
This patch adds an ELF note to the vDSO giving the LINUX_VERSION_CODE value. Having this in the vDSO lets the dynamic linker avoid the `uname' syscall it now always does at startup to ascertain the kernel ABI available. Signed-off-by:
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Roland McGrath authored
This moves the macro loaddebug from asm-i386/suspend.h to asm-i386/processor.h, which is the place that makes sense for it to be defined, removes the extra copy of the same macro in arch/i386/kernel/process.c, and makes arch/i386/kernel/signal.c use the macro in place of its expansion. This is a purely cosmetic cleanup for the normal i386 kernel. However, it is handy for Xen to be able to just redefine the loaddebug macro once instead of also changing the signal.c code. Signed-off-by:
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Jason Gaston authored
This patch adds the Intel ESB2 DID's to the i2c-i801.c and Kconfig files for I2C support. Signed-off-by:
Jason Gaston <Jason.d.gaston@intel.com> Cc: Greg KH <greg@kroah.com> Signed-off-by:
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Jason Gaston authored
This patch adds the Intel ESB2 DID's to the ahci.c file for AHCI mode SATA support. Signed-off-by:
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