- 26 Aug, 2010 6 commits
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Francisco Jerez authored
The "return" command is buggy on the original nv20, it jumps back to the caller address as expected, but it doesn't clear the subroutine active bit making the subsequent pushbuf calls fail with a "stack" overflow. Signed-off-by:
Francisco Jerez <currojerez@riseup.net> Signed-off-by:
Ben Skeggs <bskeggs@redhat.com>
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Francisco Jerez authored
The TMDS output of an nv11 was being detected as LVDS, because it uses DCB type 2 for TMDS instead of type 4. Reported-by:
Bertrand VIEILLE <Vieille.Bertrand@free.fr> Signed-off-by:
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Francisco Jerez authored
This commit fixes fdo bug 29685. Reported-by:
Vlado Plaga <rechner@vlado-do.de> Signed-off-by:
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Patrice Mandin authored
Signed-off-by:
Patrice Mandin <patmandin@gmail.com> Reviewed-by:
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Francisco Jerez authored
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Ben Skeggs authored
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- 17 Aug, 2010 11 commits
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Ben Skeggs authored
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Ben Skeggs authored
Signed-off-by: -
Francisco Jerez authored
This should fix the reported TV-out load detection false positives (fdo bug 29455). Reported-by:
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Francisco Jerez authored
The blob also thinks there's a TV connected, so hardware bug... Signed-off-by:
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Ben Skeggs authored
Fixes an infinite loop that can happen in RAMHT lookup. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
This message is apparently confusing people, and is being blamed for some modesetting issues. Lets remove the message, and instead replace it with an unconditional printout of the table revision. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
When VRAM is running out it's possible that the client's push buffers get evicted to main memory. When they're validated back in, the GPU may be used for the copy back to VRAM, but the existing synchronisation code only deals with inter-channel sync, not sync between PFIFO and PGRAPH on the same channel. This leads to PFIFO fetching from command buffers that haven't quite been copied by PGRAPH yet. This patch marks push buffers as so, and forces any GPU-assisted buffer moves to be done on a different channel, which triggers the correct synchronisation to happen before we submit them. Signed-off-by: -
Ben Skeggs authored
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Francisco Jerez authored
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- 09 Aug, 2010 6 commits
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Ben Skeggs authored
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Francisco Jerez authored
Thinko caused by 43bda05428a3d2021f3c12220073e0251c65df8b. Signed-off-by: -
Francisco Jerez authored
Fixes a regression introduced by 58bbb63720c8997e0136fe1884101e7ca40d68fd (fdo bug 29324). Reported-by:
Johannes Obermayr <johannesobermayr@gmx.de> Signed-off-by:
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Francisco Jerez authored
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Francisco Jerez authored
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Francisco Jerez authored
We need a valid OR value because there're a few nv17 cards with DCB v1.4. Signed-off-by:
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- 05 Aug, 2010 17 commits
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Ben Skeggs authored
There's some known configurations where the lack of these tables/scripts is perfectly normal, reduce visibilty of complaint messages to debug. Signed-off-by: -
Ben Skeggs authored
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Marcin Kościelnicki authored
Signed-off-by:
Marcin Kościelnicki <koriakin@0x04.net>
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Marcin Kościelnicki authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Francisco Jerez authored
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Francisco Jerez authored
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Francisco Jerez authored
sil164 and friends are the most common, usually they just need to be poked once because a fixed configuration is enough for any modes and clocks, so they worked without this patch if the BIOS had done a good job on POST. Display couldn't survive a suspend/resume cycle though. Unfortunately, BIOS scripts are useless here. Signed-off-by:
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Francisco Jerez authored
Not very nice, but I don't think there's a simpler workaround. Signed-off-by:
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Francisco Jerez authored
Leaving the IRQ unack'ed while switching contexts makes the switch fail randomly on some nv1x. Signed-off-by:
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Francisco Jerez authored
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Francisco Jerez authored
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