intel-agp.c contains actually two different drivers: An agp driver
for _physical_ agp slots an the gtt driver that is used by the intel
drm modules. Split them to prevent any further confusion.

This patch just moves the code and includes intel-gtt.c in intel-agp.c
Later patches will untangle these two drivers further.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Eric Anholt <eric@anholt.net>

Intel definitions have spilled into agp.h. Create a header file for
them and also include it in efficion-agp.c 'cause it needs a few of
them.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Eric Anholt <eric@anholt.net>

PORT_HOTPLUG_EN has allready been setup in i915_driver_irq_postinstall(),
when intel_dp_detect() runs.

Delete the DP[BCD]_HOTPLUG_INT_EN defines, they are not referenced anymore.

I found this while searching for a fix for
        https://bugzilla.redhat.com/show_bug.cgi?id=528312Signed-off-by: Karsten Wiese <fzu@wemgehoertderstaat.de>
Signed-off-by: Eric Anholt <eric@anholt.net>

This should be a small power savings. Tested on Lenovo T410 (Ironlake), LVDS
VGA and DisplayPort, up to 1920x1200R.

v2: Add Sandybridge support, fix obvious math error.
Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

Update the self-refresh watermark for display plane/cursor and enable
the memory self-refresh on Ironlake. The watermark is also updated for
the active display plane.

More than 1W idle power is saved on one Ironlake laptop after enabling
memory self-refresh.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

Previously, after setting up the Pineview CxSR state, i9xx_update_wm would
get called and overwrite our state.

BTW: We will disable the self-refresh and never enable it any more if we
can't find the appropriate the latency on pineview plaftorm. In such case
the update_wm callback will be NULL.

The bitmask macro is also defined to access the corresponding fifo
watermark register.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

Otherwise it will cause that S-video output becomes black/white when
switching to other TV format.

http://bugs.freedesktop.org/show_bug.cgi?id=23916Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Tested-by: Arnold <arnold.erbsloeh@web.de>
Tested-by: Bazin <bazin.cz@gmail.com>
Tested-by: Nigel <nigel_tuck@eircom.net>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

SDVO on Ibexpeak PCH with Ironlake is multiplexed with
HDMIB port, and only has SDVOB port.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

The existing code handling the DPMS ON event is much more careful to
ensure that these registers are enabled according to strict sequencing
requirements. Enabling these early in mode_set simply defeats that.
Signed-off-by: Carl Worth <cworth@cworth.org>
Signed-off-by: Eric Anholt <eric@anholt.net>

->dev_private at that point is NULL and is initialied only a few lines
later.
Signed-off-by: Luca Tettamanti <kronos.it@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

This reverts commit 6070a4a9.

The quirk for this SDVO device on IBM specific board is just a hack
in old code which showed the broken multifunction SDVO support in
the driver. Multifunction SDVO patch provided the right fix for it.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

With new intel_encoder/intel_connector structure change, each supported
connector type on SDVO device will be created as a new 'intel_connector',
and all attached to one 'intel_encoder' for its SDVO port.

The SDVO encoder will handle SDVO protocol stuff, and each connector does
its own part of work now, like detection is only to check if current active
output is itself, etc.

Update since last submit:
- Fixed SDVO TV property creation failure by incorrect set target output call
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

Added by original eDP support patch, not used any more.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

As all display drivers have been converted, remove the left reference
for connector object in old structure.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

Also remove old UMS copied code for get_crtc.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

Probably only matters for format-converting dongles, but might as well
get it right all the time.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

DP on Cougarpoint has new training pattern definitions, and
new transcoder DP control register is used to determine the mapping
for transcoder and DP digital output. And eDP for Sandybridge has
new voltage and pre-emphasis level definitions.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

Fix transcoder select bit for HDMI on CPT.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

Fix the transcoder select bit for LVDS on CPT.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

To make CRT force detect reliable on Cougarpoint, we need to
disable DAC before force detect, and restore back when trigger
is completed.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

Cougarpoint is the new PCH for Sandybridge CPU. This one resolves the
chipset change for display pipeline compared to previous Ibexpeak PCH.

Sandybridge/Cougarpoint has different FDI training parameters, so this also
makes seperate FDI training functions for IBX and CPT. Other change includes
new transcoder DPLL select function to set which DPLL for transcoder to pick
up.

And with another new transcoder C introduced in Cougarpoint, each connector
has new transcoder select bits. This one adds that change to light up VGA.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

PCH is the new name for south bridge from Ironlake/Sandybridge,
which contains most of the display outputs except eDP. This one
adds a probe function to detect current PCH type, and method to
detect Cougarpoint PCH.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

Integrated TV is deprecated in new chips from Ironlake.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

OpRegion event on 965G requires legacy BLC event enabled in pipe stat. As LVDS
could be on either pipe now, we should enable BLC event on both pipe. If fail to
do so, we couldn't handle the brightness request triggered from graphics
opregion.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

Based on a patch by Zhao Yakui.
Signed-off-by: Eric Anholt <eric@anholt.net>

The gen4 docs say it works, so why not.  Tested on Ironlake.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

This was brought over from UMS, and used for a while until we decided
that drm_helper_resume_force_mode was easier and more reliable, since
it didn't require duplicating all the code deleted here.  We just
forgot to delete all that junk for a while.

This one replaces original param for intel_ddc_get_modes() with
DRM connector and i2c bus adapter instead. With explicit params,
we won't require that a single driver structure must hold connector
and DDC bus reference, which ease the conversion to splitted encoder/
connector model.

It also clears up for some cases that we would steal other DDC bus
for mode probe, like VGA analog DDC probe for DVI-I. Also it fixed
a bug in old DVI-I probe handling, that failed to restore origin
analog GPIO port.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

In load detection, connector's encoder assignment must be kept
consistent for proper mode setting, and this makes connector as
explicit parameter for load detect function to not require single
data structure to hold both encoder and connector reference, ease
the transition for splitted encoder/connector model.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

For introducing splitted encoder/connector structure, this helper will return
connector's attached encoder when needed.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

This adds new structure of intel_connector to present drm's
connector object, which is used to convert from origin single
output into encoder/connector model.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

What we really want is encoder info instead of connector, so change
some more list walk in pipeline setup functions from connector_list
to encoder_list.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>