1. 25 Mar, 2020 7 commits
    • Alex Deucher's avatar
      drm/amdgpu/smu11: add a helper to set the power source · f8c83215
      Alex Deucher authored
      Add a common smu11 helper to set the AC/DC power source.
      
      Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      f8c83215
    • Evan Quan's avatar
      drm/amd/swSMU: add callback to set AC/DC power source (v2) · 2c02b38a
      Evan Quan authored
      This is needed to tell the SMU firmware what state is in
      in certain cases.  DC mode does not allow overclocking
      for example.
      
      v2: split Evan's original patch (Alex)
      
      Bug: https://gitlab.freedesktop.org/drm/amd/issues/1043Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
      Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      2c02b38a
    • Yintian Tao's avatar
      drm/scheduler: fix rare NULL ptr race · 77bb2f20
      Yintian Tao authored
      There is one one corner case at dma_fence_signal_locked
      which will raise the NULL pointer problem just like below.
      ->dma_fence_signal
          ->dma_fence_signal_locked
      	->test_and_set_bit
      here trigger dma_fence_release happen due to the zero of fence refcount.
      
      ->dma_fence_put
          ->dma_fence_release
      	->drm_sched_fence_release_scheduled
      	    ->call_rcu
      here make the union fled “cb_list” at finished fence
      to NULL because struct rcu_head contains two pointer
      which is same as struct list_head cb_list
      
      Therefore, to hold the reference of finished fence at drm_sched_process_job
      to prevent the null pointer during finished fence dma_fence_signal
      
      [  732.912867] BUG: kernel NULL pointer dereference, address: 0000000000000008
      [  732.914815] #PF: supervisor write access in kernel mode
      [  732.915731] #PF: error_code(0x0002) - not-present page
      [  732.916621] PGD 0 P4D 0
      [  732.917072] Oops: 0002 [#1] SMP PTI
      [  732.917682] CPU: 7 PID: 0 Comm: swapper/7 Tainted: G           OE     5.4.0-rc7 #1
      [  732.918980] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS rel-1.8.2-0-g33fbe13 by qemu-project.org 04/01/2014
      [  732.920906] RIP: 0010:dma_fence_signal_locked+0x3e/0x100
      [  732.938569] Call Trace:
      [  732.939003]  <IRQ>
      [  732.939364]  dma_fence_signal+0x29/0x50
      [  732.940036]  drm_sched_fence_finished+0x12/0x20 [gpu_sched]
      [  732.940996]  drm_sched_process_job+0x34/0xa0 [gpu_sched]
      [  732.941910]  dma_fence_signal_locked+0x85/0x100
      [  732.942692]  dma_fence_signal+0x29/0x50
      [  732.943457]  amdgpu_fence_process+0x99/0x120 [amdgpu]
      [  732.944393]  sdma_v4_0_process_trap_irq+0x81/0xa0 [amdgpu]
      
      v2: hold the finished fence at drm_sched_process_job instead of
          amdgpu_fence_process
      v3: resume the blank line
      Signed-off-by: default avatarYintian Tao <yttao@amd.com>
      Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      77bb2f20
    • Dennis Li's avatar
      drm/amdgpu: fix the coverage issue to clear ArcVPGRs · 10cda519
      Dennis Li authored
      Set ComputePGMRSRC1.VGPRS as 0x3f to clear all ArcVGPRs.
      Signed-off-by: default avatarDennis Li <Dennis.Li@amd.com>
      Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      10cda519
    • Mario Kleiner's avatar
      drm/amd/display: Fix pageflip event race condition for DCN. · 2b5aed9a
      Mario Kleiner authored
      Commit '16f17eda ("drm/amd/display: Send vblank and user
      events at vsartup for DCN")' introduces a new way of pageflip
      completion handling for DCN, and some trouble.
      
      The current implementation introduces a race condition, which
      can cause pageflip completion events to be sent out one vblank
      too early, thereby confusing userspace and causing flicker:
      
      prepare_flip_isr():
      
      1. Pageflip programming takes the ddev->event_lock.
      2. Sets acrtc->pflip_status == AMDGPU_FLIP_SUBMITTED
      3. Releases ddev->event_lock.
      
      --> Deadline for surface address regs double-buffering passes on
          target pipe.
      
      4. dc_commit_updates_for_stream() MMIO programs the new pageflip
         into hw, but too late for current vblank.
      
      => pflip_status == AMDGPU_FLIP_SUBMITTED, but flip won't complete
         in current vblank due to missing the double-buffering deadline
         by a tiny bit.
      
      5. VSTARTUP trigger point in vblank is reached, VSTARTUP irq fires,
         dm_dcn_crtc_high_irq() gets called.
      
      6. Detects pflip_status == AMDGPU_FLIP_SUBMITTED and assumes the
         pageflip has been completed/will complete in this vblank and
         sends out pageflip completion event to userspace and resets
         pflip_status = AMDGPU_FLIP_NONE.
      
      => Flip completion event sent out one vblank too early.
      
      This behaviour has been observed during my testing with measurement
      hardware a couple of time.
      
      The commit message says that the extra flip event code was added to
      dm_dcn_crtc_high_irq() to prevent missing to send out pageflip events
      in case the pflip irq doesn't fire, because the "DCH HUBP" component
      is clock gated and doesn't fire pflip irqs in that state. Also that
      this clock gating may happen if no planes are active. This suggests
      that the problem addressed by that commit can't happen if planes
      are active.
      
      The proposed solution is therefore to only execute the extra pflip
      completion code iff the count of active planes is zero and otherwise
      leave pflip completion handling to the pflip irq handler, for a
      more race-free experience.
      
      Note that i don't know if this fixes the problem the original commit
      tried to address, as i don't know what the test scenario was. It
      does fix the observed too early pageflip events though and points
      out the problem introduced.
      
      Fixes: 16f17eda ("drm/amd/display: Send vblank and user events at vsartup for DCN")
      Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
      Signed-off-by: default avatarMario Kleiner <mario.kleiner.de@gmail.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      2b5aed9a
    • Yassine Oudjana's avatar
      drm/[radeon|amdgpu]: Remove HAINAN board from max_sclk override check · c7e55879
      Yassine Oudjana authored
      Works stable without the overrides.
      Signed-off-by: default avatarYassine Oudjana <y.oudjana@protonmail.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      c7e55879
    • Zhigang Luo's avatar
      Revert "drm/amdgpu: add CAP fw loading" · 728b3d05
      Zhigang Luo authored
      This reverts commit 29e2501f.
      Signed-off-by: default avatarZhigang Luo <zhigang.luo@amd.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      728b3d05
  2. 20 Mar, 2020 4 commits
  3. 19 Mar, 2020 29 commits