• Alexey Kopytov's avatar
    Few improvements related to CPU cache line size and padding: · 49ad0845
    Alexey Kopytov authored
    Bug #79636: CACHE_LINE_SIZE should be 128 on AArch64
    Bug #79637: Hard-coded cache line size
    Bug #79638: Reconcile CACHE_LINE_SIZE with CPU_LEVEL1_DCACHE_LINESIZE
    Bug #79652: Suspicious padding in srv_conc_t
    
    - changed CPU_LEVEL1_DCACHE_LINESIZE to default to 128 bytes on POWER
      and AArch64 architectures in cases when no value could be detected
      by CMake using getconf
    
    - changed CACHE_LINE_SIZE definition in ut0counter.h to be an alias of
      CPU_LEVEL1_DCACHE_LINESIZE
    
    - changed a number of hard-coded 64-byte cache line size values in the
      InnoDB code
    
    - fixed insufficient padding for srv_conc members in srv0conc.cc
    
    Ported to Mariadb by Daniel Black <daniel.black@au.ibm.com>
    Added s390 cache size of 256 at same time.
    49ad0845
my_global.h 33.5 KB