• Marko Mäkelä's avatar
    MDEV-26720: Optimize single-bit atomic operations on IA-32 and AMD64 · 668a5f3d
    Marko Mäkelä authored
    This is mostly working around a bad compiler optimization.
    
    The Intel 80386 processor introduced some bit operations that would be
    the perfect translation for atomic single-bit read-modify-and-write
    operations. Alas, even the latest compilers as of today
    (GCC 11, clang 13, Microsoft Visual C 19.29) would generate a loop around
    LOCK CMPXCHG instead of emitting the instructions
    LOCK BTS (fetch_or()), LOCK BTR (fetch_and()), LOCK BTC (fetch_xor()).
    
    fil_space_t::clear_closing(): Clear the CLOSING flag.
    
    fil_space_t::set_stopping_check(): Special variant of
    fil_space_t::set_stopping() that will return the old value
    of the STOPPING flag after atomically setting it.
    
    fil_space_t::clear_stopping(): Use fetch_sub() to toggle
    the STOPPING flag. The flag is guaranteed to be set upon
    calling this function, hence we will toggle it to clear it.
    On IA-32 and AMD64, this will translate into
    the 80486 LOCK XADD instruction.
    
    fil_space_t::check_pending_operations(): Replace a Boolean
    variable with a goto label, to allow more compact code
    generation for fil_space_t::set_stopping_check().
    
    trx_rseg_t: Define private accessors ref_set() and ref_reset()
    for setting and clearing the flags.
    
    trx_lock_t::clear_deadlock_victim(), trx_lock_t::set_wsrep_victim():
    Accessors for clearing and setting the flags.
    668a5f3d
lock0lock.cc 181 KB