Commit 9ef36faa authored by Marko Mäkelä's avatar Marko Mäkelä

MDEV-23618 InnoDB lacks IA-32 CRC-32C acceleration on GCC 4

When MDEV-22669 introduced CRC-32C acceleration to IA-32,
it worked around a compiler bug by disabling the acceleration
on GCC 4 for IA-32 altogether, even though the compiler bug
only affects -fPIC builds that are targeting IA-32.

Let us extend the solution fe5dbfe7
and define HAVE_CPUID_INSTRUCTION that allows us to implement
a necessary and sufficient work-around of the compiler bug.
parent c14ecc75
...@@ -103,6 +103,7 @@ ...@@ -103,6 +103,7 @@
#cmakedefine HAVE_LIBWRAP 1 #cmakedefine HAVE_LIBWRAP 1
#cmakedefine HAVE_SYSTEMD 1 #cmakedefine HAVE_SYSTEMD 1
#cmakedefine HAVE_CPUID_INSTRUCTION 1
#cmakedefine HAVE_CLMUL_INSTRUCTION 1 #cmakedefine HAVE_CLMUL_INSTRUCTION 1
#cmakedefine HAVE_CRC32_VPMSUM 1 #cmakedefine HAVE_CRC32_VPMSUM 1
......
...@@ -58,7 +58,9 @@ IF (WIN32) ...@@ -58,7 +58,9 @@ IF (WIN32)
my_win_popen.cc) my_win_popen.cc)
ENDIF() ENDIF()
IF(NOT MSVC AND CMAKE_SYSTEM_PROCESSOR MATCHES "x86_64|amd64|i[36]86") IF(MSVC)
SET(HAVE_CPUID_INSTRUCTION 1 CACHE BOOL "")
ELSEIF(CMAKE_SYSTEM_PROCESSOR MATCHES "x86_64|amd64|i[36]86")
#Check for CPUID and PCLMUL. GCC before version 5 would refuse to emit the #Check for CPUID and PCLMUL. GCC before version 5 would refuse to emit the
#CPUID instruction for -m32 -fPIC because it would clobber the EBX register. #CPUID instruction for -m32 -fPIC because it would clobber the EBX register.
CHECK_C_SOURCE_COMPILES(" CHECK_C_SOURCE_COMPILES("
...@@ -70,6 +72,7 @@ IF(NOT MSVC AND CMAKE_SYSTEM_PROCESSOR MATCHES "x86_64|amd64|i[36]86") ...@@ -70,6 +72,7 @@ IF(NOT MSVC AND CMAKE_SYSTEM_PROCESSOR MATCHES "x86_64|amd64|i[36]86")
}" HAVE_CLMUL_INSTRUCTION) }" HAVE_CLMUL_INSTRUCTION)
IF(HAVE_CLMUL_INSTRUCTION) IF(HAVE_CLMUL_INSTRUCTION)
SET(HAVE_CPUID_INSTRUCTION 1 CACHE BOOL "")
SET(MYSYS_SOURCES ${MYSYS_SOURCES} crc32/crc32_x86.c) SET(MYSYS_SOURCES ${MYSYS_SOURCES} crc32/crc32_x86.c)
ENDIF() ENDIF()
ELSEIF(CMAKE_SYSTEM_PROCESSOR MATCHES "aarch64|AARCH64") ELSEIF(CMAKE_SYSTEM_PROCESSOR MATCHES "aarch64|AARCH64")
......
...@@ -102,17 +102,7 @@ const char* ut_crc32_implementation = "Using POWER8 crc32 instructions"; ...@@ -102,17 +102,7 @@ const char* ut_crc32_implementation = "Using POWER8 crc32 instructions";
extern "C" { extern "C" {
uint32_t crc32c_aarch64(uint32_t crc, const unsigned char *buffer, uint64_t len); uint32_t crc32c_aarch64(uint32_t crc, const unsigned char *buffer, uint64_t len);
}; };
# elif defined(_MSC_VER) # elif defined HAVE_CPUID_INSTRUCTION
# define TRY_SSE4_2
# elif defined (__GNUC__)
# ifdef __x86_64__
# define TRY_SSE4_2
# elif defined(__i386__) && (__GNUC__ > 4 || defined __clang__)
# define TRY_SSE4_2
# endif
# endif
# ifdef TRY_SSE4_2
/** return whether SSE4.2 instructions are available */ /** return whether SSE4.2 instructions are available */
static inline bool has_sse4_2() static inline bool has_sse4_2()
{ {
...@@ -349,7 +339,7 @@ void ut_crc32_init() ...@@ -349,7 +339,7 @@ void ut_crc32_init()
ut_crc32_implementation= crc32c_implementation; ut_crc32_implementation= crc32c_implementation;
return; return;
} }
# elif defined(TRY_SSE4_2) # elif defined HAVE_CPUID_INSTRUCTION
if (has_sse4_2()) if (has_sse4_2())
{ {
ut_crc32_low= ut_crc32_hw; ut_crc32_low= ut_crc32_hw;
......
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