Commit ec619a1d authored by Marko Mäkelä's avatar Marko Mäkelä

MDEV-26467 fixup: Prefer fetch_add() to fetch_or() on IA-32 and AMD64

parent a49e3943
......@@ -226,8 +226,18 @@ class ssux_lock_impl final
void wr_lock()
{
writer.wr_lock();
#if defined __i386__||defined __x86_64__||defined _M_IX86||defined _M_IX64
/* On IA-32 and AMD64, this type of fetch_or() can only be implemented
as a loop around LOCK CMPXCHG. In this particular case, setting the
most significant bit using fetch_add() is equivalent, and is
translated into a simple LOCK XADD. */
static_assert(WRITER == 1U << 31, "compatibility");
if (uint32_t lk= readers.fetch_add(WRITER, std::memory_order_acquire))
wr_wait(lk);
#else
if (uint32_t lk= readers.fetch_or(WRITER, std::memory_order_acquire))
wr_wait(lk);
#endif
}
void u_wr_upgrade()
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment