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nexedi
ors-root-access
Commits
5125dbbf
Commit
5125dbbf
authored
Sep 16, 2024
by
Joanne Hugé
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add flash-fpga
parent
3e07cb16
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README.md
README.md
+28
-0
flash-fpga/0001-Patch-spi.c-for-ORS.patch
flash-fpga/0001-Patch-spi.c-for-ORS.patch
+25
-0
flash-fpga/bscan_spi_xc7a35t.bit
flash-fpga/bscan_spi_xc7a35t.bit
+0
-0
flash-fpga/init.sh
flash-fpga/init.sh
+11
-0
flash-fpga/patch-FPGA.sh
flash-fpga/patch-FPGA.sh
+5
-0
flash-fpga/pcie_radio.cfg
flash-fpga/pcie_radio.cfg
+20
-0
No files found.
README.md
View file @
5125dbbf
# ors-root-access
## Check your FPGA version
You can check your FPGA version by doing:
root@orsXXX:~# AMARISOFT_PATH/trx_sdr/sdr_util version
SDR board utilities version 2023-09-09, Copyright (C) 2012-2023 Amarisoft
=== Device /dev/sdr0 ===
Board ID: 0x4b01 (SDR50)
Board revision: 0x0
FPGA revision: 2021-10-08 15:38:12 (upgrade rev: 2023-06-27)
FPGA status: operational
FPGA flash: Infineon/Cypress(32 MB)
Software version: 2023-09-09
DMA: 1 ch, 32 bits, SMem index: Off
DNA: [0x19296160552233052]
Serial ''
PCIe bus: bus=0x01 FPGA PCI gen2 x1 (4.0Gb/s) OK
Please check "Software version" is 2023-09-09
# Patch your FPGA
To patch your FPGA, first get the ORS 2023-09-09 bitstream from Rapid.Space, then:
root@orsXXX:~/ors-root-access/flash-fpga# ./init.sh
root@orsXXX:~/ors-root-access/flash-fpga# ./patch-FPGA.sh
Then do a hard reboot by unplugging the ORS and replugging it (make sure not to unplug it from the POE cable)
flash-fpga/0001-Patch-spi.c-for-ORS.patch
0 → 100644
View file @
5125dbbf
From 2fba515f5e3e3f9d3c3685b92bd927f83649cfdd Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Joanne=20Hug=C3=A9?= <joanne.huge@nexedi.com>
Date: Fri, 10 Mar 2023 14:45:44 +0100
Subject: [PATCH] Patch spi.c for ORS
---
src/flash/nor/spi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/flash/nor/spi.c b/src/flash/nor/spi.c
index 937c194e6..7f459606c 100644
--- a/src/flash/nor/spi.c
+++ b/src/flash/nor/spi.c
@@ -61,7 +61,7 @@
const struct flash_device flash_devices[] = {
FLASH_ID("sp s25fl512s", 0x13, 0x00, 0x12, 0xdc, 0xc7, 0x00200201, 0x200, 0x40000, 0x4000000),
FLASH_ID("cyp s25fl064l", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x00176001, 0x100, 0x10000, 0x800000),
FLASH_ID("cyp s25fl128l", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x00186001, 0x100, 0x10000, 0x1000000),
- FLASH_ID("cyp s25fl256l", 0x13, 0x00, 0x12, 0xdc, 0xc7, 0x00196001, 0x100, 0x10000, 0x2000000),
+ FLASH_ID("cyp s25fl256l", 0x13, 0x00, 0x12, 0xd8, 0xc7, 0x00196001, 0x100, 0x10000, 0x2000000),
FLASH_ID("atmel 25f512", 0x03, 0x00, 0x02, 0x52, 0xc7, 0x0065001f, 0x80, 0x8000, 0x10000),
FLASH_ID("atmel 25f1024", 0x03, 0x00, 0x02, 0x52, 0x62, 0x0060001f, 0x100, 0x8000, 0x20000),
FLASH_ID("atmel 25f2048", 0x03, 0x00, 0x02, 0x52, 0x62, 0x0063001f, 0x100, 0x10000, 0x40000),
--
2.34.1
flash-fpga/bscan_spi_xc7a35t.bit
0 → 100644
View file @
5125dbbf
File added
flash-fpga/init.sh
0 → 100755
View file @
5125dbbf
#!/bin/bash
DIR
=
$(
dirname
$(
realpath
$0
))
cd
$DIR
apt
install
libtool pkg-config libusb-1.0-0-dev
git clone https://github.com/openocd-org/openocd openocd
cd
openocd
git checkout v0.11.0
git am <
$DIR
/0001-Patch-spi.c-for-ORS.patch
./bootstrap
./configure
--enable-ftdi
make
-j
4
flash-fpga/patch-FPGA.sh
0 → 100755
View file @
5125dbbf
#!/bin/bash
DIR
=
$(
dirname
$(
realpath
$0
))
lsmod |
grep
-q
sdr
&&
rmmod sdr
;
cd
$DIR
;
./openocd/src/openocd
-s
./openocd/tcl
-f
pcie_radio.cfg
flash-fpga/pcie_radio.cfg
0 → 100644
View file @
5125dbbf
interface ftdi
ftdi_vid_pid 0x0403 0x6014
ftdi_channel 0
ftdi_layout_init 0x00e8 0x60eb
reset_config none
source [find cpld/xilinx-xc7.cfg]
source [find cpld/jtagspi.cfg]
adapter_khz 10000
proc fpga_program {} {
global _CHIPNAME
xc7_program $_CHIPNAME.tap
}
init
jtagspi_init 0 bscan_spi_xc7a35t.bit
jtagspi_program xc7a35t_2023-09-09-ors.bin 0x0
fpga_program
shutdown
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