bfin_sport_uart.c 21.3 KB
Newer Older
1
/*
2
 * Blackfin On-Chip Sport Emulated UART Driver
3
 *
4
 * Copyright 2006-2009 Analog Devices Inc.
5
 *
6
 * Enter bugs at http://blackfin.uclinux.org/
7
 *
8
 * Licensed under the GPL-2 or later.
9 10 11 12 13 14 15
 */

/*
 * This driver and the hardware supported are in term of EE-191 of ADI.
 * http://www.analog.com/UploadedFiles/Application_Notes/399447663EE191.pdf
 * This application note describe how to implement a UART on a Sharc DSP,
 * but this driver is implemented on Blackfin Processor.
16
 * Transmit Frame Sync is not used by this driver to transfer data out.
17 18
 */

19
/* #define DEBUG */
20

21 22 23
#define DRV_NAME "bfin-sport-uart"
#define DEVICE_NAME	"ttySS"
#define pr_fmt(fmt) DRV_NAME ": " fmt
24 25 26

#include <linux/module.h>
#include <linux/ioport.h>
27
#include <linux/io.h>
28 29 30
#include <linux/init.h>
#include <linux/console.h>
#include <linux/sysrq.h>
31
#include <linux/slab.h>
32 33 34 35 36 37 38 39 40 41
#include <linux/platform_device.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/serial_core.h>

#include <asm/delay.h>
#include <asm/portmux.h>

#include "bfin_sport_uart.h"

42
#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
43 44 45
unsigned short bfin_uart_pin_req_sport0[] =
	{P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, \
	 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0};
46 47
#endif
#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
48 49 50
unsigned short bfin_uart_pin_req_sport1[] =
	{P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, \
	P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0};
51 52 53 54 55 56 57 58 59 60 61
#endif
#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
unsigned short bfin_uart_pin_req_sport2[] =
	{P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS, \
	P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0};
#endif
#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
unsigned short bfin_uart_pin_req_sport3[] =
	{P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS, \
	P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0};
#endif
62 63 64 65

struct sport_uart_port {
	struct uart_port	port;
	int			err_irq;
66 67 68 69 70 71
	unsigned short		csize;
	unsigned short		rxmask;
	unsigned short		txmask1;
	unsigned short		txmask2;
	unsigned char		stopb;
/*	unsigned char		parib; */
72 73 74 75 76 77 78
};

static void sport_uart_tx_chars(struct sport_uart_port *up);
static void sport_stop_tx(struct uart_port *port);

static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value)
{
79 80 81 82
	pr_debug("%s value:%x, mask1=0x%x, mask2=0x%x\n", __func__, value,
		up->txmask1, up->txmask2);

	/* Place Start and Stop bits */
83
	__asm__ __volatile__ (
84 85 86 87 88 89
		"%[val] <<= 1;"
		"%[val] = %[val] & %[mask1];"
		"%[val] = %[val] | %[mask2];"
		: [val]"+d"(value)
		: [mask1]"d"(up->txmask1), [mask2]"d"(up->txmask2)
		: "ASTAT"
90
	);
91
	pr_debug("%s value:%x\n", __func__, value);
92 93 94 95

	SPORT_PUT_TX(up, value);
}

96
static inline unsigned char rx_one_byte(struct sport_uart_port *up)
97
{
98 99
	unsigned int value;
	unsigned char extract;
100
	u32 tmp_mask1, tmp_mask2, tmp_shift, tmp;
101

102 103 104 105 106 107 108
	if ((up->csize + up->stopb) > 7)
		value = SPORT_GET_RX32(up);
	else
		value = SPORT_GET_RX(up);

	pr_debug("%s value:%x, cs=%d, mask=0x%x\n", __func__, value,
		up->csize, up->rxmask);
109

110
	/* Extract data */
111 112
	__asm__ __volatile__ (
		"%[extr] = 0;"
113 114
		"%[mask1] = %[rxmask];"
		"%[mask2] = 0x0200(Z);"
115 116 117 118 119 120 121 122 123
		"%[shift] = 0;"
		"LSETUP(.Lloop_s, .Lloop_e) LC0 = %[lc];"
		".Lloop_s:"
		"%[tmp] = extract(%[val], %[mask1].L)(Z);"
		"%[tmp] <<= %[shift];"
		"%[extr] = %[extr] | %[tmp];"
		"%[mask1] = %[mask1] - %[mask2];"
		".Lloop_e:"
		"%[shift] += 1;"
124 125 126
		: [extr]"=&d"(extract), [shift]"=&d"(tmp_shift), [tmp]"=&d"(tmp),
		  [mask1]"=&d"(tmp_mask1), [mask2]"=&d"(tmp_mask2)
		: [val]"d"(value), [rxmask]"d"(up->rxmask), [lc]"a"(up->csize)
127 128
		: "ASTAT", "LB0", "LC0", "LT0"
	);
129 130 131 132 133

	pr_debug("	extract:%x\n", extract);
	return extract;
}

134
static int sport_uart_setup(struct sport_uart_port *up, int size, int baud_rate)
135
{
136 137
	int tclkdiv, rclkdiv;
	unsigned int sclk = get_sclk();
138

139 140 141
	/* Set TCR1 and TCR2, TFSR is not enabled for uart */
	SPORT_PUT_TCR1(up, (ITFS | TLSBIT | ITCLK));
	SPORT_PUT_TCR2(up, size + 1);
142
	pr_debug("%s TCR1:%x, TCR2:%x\n", __func__, SPORT_GET_TCR1(up), SPORT_GET_TCR2(up));
143 144 145

	/* Set RCR1 and RCR2 */
	SPORT_PUT_RCR1(up, (RCKFE | LARFS | LRFS | RFSR | IRCLK));
146
	SPORT_PUT_RCR2(up, (size + 1) * 2 - 1);
147
	pr_debug("%s RCR1:%x, RCR2:%x\n", __func__, SPORT_GET_RCR1(up), SPORT_GET_RCR2(up));
148

149 150
	tclkdiv = sclk / (2 * baud_rate) - 1;
	rclkdiv = sclk / (2 * baud_rate * 2) - 1;
151 152 153
	SPORT_PUT_TCLKDIV(up, tclkdiv);
	SPORT_PUT_RCLKDIV(up, rclkdiv);
	SSYNC();
154 155
	pr_debug("%s sclk:%d, baud_rate:%d, tclkdiv:%d, rclkdiv:%d\n",
			__func__, sclk, baud_rate, tclkdiv, rclkdiv);
156 157 158 159 160 161 162

	return 0;
}

static irqreturn_t sport_uart_rx_irq(int irq, void *dev_id)
{
	struct sport_uart_port *up = dev_id;
Alan Cox's avatar
Alan Cox committed
163
	struct tty_struct *tty = up->port.state->port.tty;
164 165
	unsigned int ch;

166 167 168
	spin_lock(&up->port.lock);

	while (SPORT_GET_STAT(up) & RXNE) {
169 170 171
		ch = rx_one_byte(up);
		up->port.icount.rx++;

172
		if (!uart_handle_sysrq_char(&up->port, ch))
173
			tty_insert_flip_char(tty, ch, TTY_NORMAL);
174
	}
175 176
	tty_flip_buffer_push(tty);

177 178
	spin_unlock(&up->port.lock);

179 180 181 182 183
	return IRQ_HANDLED;
}

static irqreturn_t sport_uart_tx_irq(int irq, void *dev_id)
{
184 185 186 187 188
	struct sport_uart_port *up = dev_id;

	spin_lock(&up->port.lock);
	sport_uart_tx_chars(up);
	spin_unlock(&up->port.lock);
189 190 191 192 193 194 195

	return IRQ_HANDLED;
}

static irqreturn_t sport_uart_err_irq(int irq, void *dev_id)
{
	struct sport_uart_port *up = dev_id;
Alan Cox's avatar
Alan Cox committed
196
	struct tty_struct *tty = up->port.state->port.tty;
197 198
	unsigned int stat = SPORT_GET_STAT(up);

199 200
	spin_lock(&up->port.lock);

201 202 203 204 205 206 207 208
	/* Overflow in RX FIFO */
	if (stat & ROVF) {
		up->port.icount.overrun++;
		tty_insert_flip_char(tty, 0, TTY_OVERRUN);
		SPORT_PUT_STAT(up, ROVF); /* Clear ROVF bit */
	}
	/* These should not happen */
	if (stat & (TOVF | TUVF | RUVF)) {
209 210 211 212
		pr_err("SPORT Error:%s %s %s\n",
		       (stat & TOVF) ? "TX overflow" : "",
		       (stat & TUVF) ? "TX underflow" : "",
		       (stat & RUVF) ? "RX underflow" : "");
213 214 215 216 217
		SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
		SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
	}
	SSYNC();

218
	spin_unlock(&up->port.lock);
219 220 221 222 223 224 225
	return IRQ_HANDLED;
}

/* Reqeust IRQ, Setup clock */
static int sport_startup(struct uart_port *port)
{
	struct sport_uart_port *up = (struct sport_uart_port *)port;
226
	int ret;
227

228
	pr_debug("%s enter\n", __func__);
229 230 231 232 233
	ret = request_irq(up->port.irq, sport_uart_rx_irq, 0,
		"SPORT_UART_RX", up);
	if (ret) {
		dev_err(port->dev, "unable to request SPORT RX interrupt\n");
		return ret;
234 235
	}

236 237 238 239
	ret = request_irq(up->port.irq+1, sport_uart_tx_irq, 0,
		"SPORT_UART_TX", up);
	if (ret) {
		dev_err(port->dev, "unable to request SPORT TX interrupt\n");
240 241 242
		goto fail1;
	}

243 244 245 246
	ret = request_irq(up->err_irq, sport_uart_err_irq, 0,
		"SPORT_UART_STATUS", up);
	if (ret) {
		dev_err(port->dev, "unable to request SPORT status interrupt\n");
247 248 249 250
		goto fail2;
	}

	return 0;
251 252 253 254
 fail2:
	free_irq(up->port.irq+1, up);
 fail1:
	free_irq(up->port.irq, up);
255

256
	return ret;
257 258 259 260
}

static void sport_uart_tx_chars(struct sport_uart_port *up)
{
Alan Cox's avatar
Alan Cox committed
261
	struct circ_buf *xmit = &up->port.state->xmit;
262 263 264 265 266 267 268 269 270 271 272 273

	if (SPORT_GET_STAT(up) & TXF)
		return;

	if (up->port.x_char) {
		tx_one_byte(up, up->port.x_char);
		up->port.icount.tx++;
		up->port.x_char = 0;
		return;
	}

	if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
274 275 276 277 278 279 280
		/* The waiting loop to stop SPORT TX from TX interrupt is
		 * too long. This may block SPORT RX interrupts and cause
		 * RX FIFO overflow. So, do stop sport TX only after the last
		 * char in TX FIFO is moved into the shift register.
		 */
		if (SPORT_GET_STAT(up) & TXHRE)
			sport_stop_tx(&up->port);
281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299
		return;
	}

	while(!(SPORT_GET_STAT(up) & TXF) && !uart_circ_empty(xmit)) {
		tx_one_byte(up, xmit->buf[xmit->tail]);
		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE -1);
		up->port.icount.tx++;
	}

	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(&up->port);
}

static unsigned int sport_tx_empty(struct uart_port *port)
{
	struct sport_uart_port *up = (struct sport_uart_port *)port;
	unsigned int stat;

	stat = SPORT_GET_STAT(up);
300
	pr_debug("%s stat:%04x\n", __func__, stat);
301 302 303 304 305 306 307 308
	if (stat & TXHRE) {
		return TIOCSER_TEMT;
	} else
		return 0;
}

static unsigned int sport_get_mctrl(struct uart_port *port)
{
309
	pr_debug("%s enter\n", __func__);
310 311 312 313 314
	return (TIOCM_CTS | TIOCM_CD | TIOCM_DSR);
}

static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
315
	pr_debug("%s enter\n", __func__);
316 317 318 319 320 321
}

static void sport_stop_tx(struct uart_port *port)
{
	struct sport_uart_port *up = (struct sport_uart_port *)port;

322
	pr_debug("%s enter\n", __func__);
323 324

	/* Although the hold register is empty, last byte is still in shift
325 326 327 328 329 330 331
	 * register and not sent out yet. So, put a dummy data into TX FIFO.
	 * Then, sport tx stops when last byte is shift out and the dummy
	 * data is moved into the shift register.
	 */
	SPORT_PUT_TX(up, 0xffff);
	while (!(SPORT_GET_STAT(up) & TXHRE))
		cpu_relax();
332 333 334 335 336 337 338 339 340 341 342

	SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
	SSYNC();

	return;
}

static void sport_start_tx(struct uart_port *port)
{
	struct sport_uart_port *up = (struct sport_uart_port *)port;

343
	pr_debug("%s enter\n", __func__);
344

345 346 347 348 349 350
	/* Write data into SPORT FIFO before enable SPROT to transmit */
	sport_uart_tx_chars(up);

	/* Enable transmit, then an interrupt will generated */
	SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
	SSYNC();
351
	pr_debug("%s exit\n", __func__);
352 353 354 355 356 357
}

static void sport_stop_rx(struct uart_port *port)
{
	struct sport_uart_port *up = (struct sport_uart_port *)port;

358
	pr_debug("%s enter\n", __func__);
359 360 361 362 363 364 365
	/* Disable sport to stop rx */
	SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
	SSYNC();
}

static void sport_enable_ms(struct uart_port *port)
{
366
	pr_debug("%s enter\n", __func__);
367 368 369 370
}

static void sport_break_ctl(struct uart_port *port, int break_state)
{
371
	pr_debug("%s enter\n", __func__);
372 373 374 375 376 377
}

static void sport_shutdown(struct uart_port *port)
{
	struct sport_uart_port *up = (struct sport_uart_port *)port;

378
	dev_dbg(port->dev, "%s enter\n", __func__);
379 380 381 382 383 384

	/* Disable sport */
	SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
	SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
	SSYNC();

385 386
	free_irq(up->port.irq, up);
	free_irq(up->port.irq+1, up);
387 388 389 390 391 392 393
	free_irq(up->err_irq, up);
}

static const char *sport_type(struct uart_port *port)
{
	struct sport_uart_port *up = (struct sport_uart_port *)port;

394
	pr_debug("%s enter\n", __func__);
395
	return up->port.type == PORT_BFIN_SPORT ? "BFIN-SPORT-UART" : NULL;
396 397 398 399
}

static void sport_release_port(struct uart_port *port)
{
400
	pr_debug("%s enter\n", __func__);
401 402 403 404
}

static int sport_request_port(struct uart_port *port)
{
405
	pr_debug("%s enter\n", __func__);
406 407 408 409 410 411 412
	return 0;
}

static void sport_config_port(struct uart_port *port, int flags)
{
	struct sport_uart_port *up = (struct sport_uart_port *)port;

413
	pr_debug("%s enter\n", __func__);
414 415 416 417 418
	up->port.type = PORT_BFIN_SPORT;
}

static int sport_verify_port(struct uart_port *port, struct serial_struct *ser)
{
419
	pr_debug("%s enter\n", __func__);
420 421 422
	return 0;
}

423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526
static void sport_set_termios(struct uart_port *port,
		struct ktermios *termios, struct ktermios *old)
{
	struct sport_uart_port *up = (struct sport_uart_port *)port;
	unsigned long flags;
	int i;

	pr_debug("%s enter, c_cflag:%08x\n", __func__, termios->c_cflag);

	switch (termios->c_cflag & CSIZE) {
	case CS8:
		up->csize = 8;
		break;
	case CS7:
		up->csize = 7;
		break;
	case CS6:
		up->csize = 6;
		break;
	case CS5:
		up->csize = 5;
		break;
	default:
		pr_warning("requested word length not supported\n");
	}

	if (termios->c_cflag & CSTOPB) {
		up->stopb = 1;
	}
	if (termios->c_cflag & PARENB) {
		pr_warning("PAREN bits is not supported yet\n");
		/* up->parib = 1; */
	}

	port->read_status_mask = OE;
	if (termios->c_iflag & INPCK)
		port->read_status_mask |= (FE | PE);
	if (termios->c_iflag & (BRKINT | PARMRK))
		port->read_status_mask |= BI;

	/*
	 * Characters to ignore
	 */
	port->ignore_status_mask = 0;
	if (termios->c_iflag & IGNPAR)
		port->ignore_status_mask |= FE | PE;
	if (termios->c_iflag & IGNBRK) {
		port->ignore_status_mask |= BI;
		/*
		 * If we're ignoring parity and break indicators,
		 * ignore overruns too (for real raw support).
		 */
		if (termios->c_iflag & IGNPAR)
			port->ignore_status_mask |= OE;
	}

	/* RX extract mask */
	up->rxmask = 0x01 | (((up->csize + up->stopb) * 2 - 1) << 0x8);
	/* TX masks, 8 bit data and 1 bit stop for example:
	 * mask1 = b#0111111110
	 * mask2 = b#1000000000
	 */
	for (i = 0, up->txmask1 = 0; i < up->csize; i++)
		up->txmask1 |= (1<<i);
	up->txmask2 = (1<<i);
	if (up->stopb) {
		++i;
		up->txmask2 |= (1<<i);
	}
	up->txmask1 <<= 1;
	up->txmask2 <<= 1;
	/* uart baud rate */
	port->uartclk = uart_get_baud_rate(port, termios, old, 0, get_sclk()/16);

	spin_lock_irqsave(&up->port.lock, flags);

	/* Disable UART */
	SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
	SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);

	sport_uart_setup(up, up->csize + up->stopb, port->uartclk);

	/* driver TX line high after config, one dummy data is
	 * necessary to stop sport after shift one byte
	 */
	SPORT_PUT_TX(up, 0xffff);
	SPORT_PUT_TX(up, 0xffff);
	SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
	SSYNC();
	while (!(SPORT_GET_STAT(up) & TXHRE))
		cpu_relax();
	SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
	SSYNC();

	/* Port speed changed, update the per-port timeout. */
	uart_update_timeout(port, termios->c_cflag, port->uartclk);

	/* Enable sport rx */
	SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) | RSPEN);
	SSYNC();

	spin_unlock_irqrestore(&up->port.lock, flags);
}

527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545
struct uart_ops sport_uart_ops = {
	.tx_empty	= sport_tx_empty,
	.set_mctrl	= sport_set_mctrl,
	.get_mctrl	= sport_get_mctrl,
	.stop_tx	= sport_stop_tx,
	.start_tx	= sport_start_tx,
	.stop_rx	= sport_stop_rx,
	.enable_ms	= sport_enable_ms,
	.break_ctl	= sport_break_ctl,
	.startup	= sport_startup,
	.shutdown	= sport_shutdown,
	.set_termios	= sport_set_termios,
	.type		= sport_type,
	.release_port	= sport_release_port,
	.request_port	= sport_request_port,
	.config_port	= sport_config_port,
	.verify_port	= sport_verify_port,
};

546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621
#define BFIN_SPORT_UART_MAX_PORTS 4

static struct sport_uart_port *bfin_sport_uart_ports[BFIN_SPORT_UART_MAX_PORTS];

#ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
static int __init
sport_uart_console_setup(struct console *co, char *options)
{
	struct sport_uart_port *up;
	int baud = 57600;
	int bits = 8;
	int parity = 'n';
	int flow = 'n';

	/* Check whether an invalid uart number has been specified */
	if (co->index < 0 || co->index >= BFIN_SPORT_UART_MAX_PORTS)
		return -ENODEV;

	up = bfin_sport_uart_ports[co->index];
	if (!up)
		return -ENODEV;

	if (options)
		uart_parse_options(options, &baud, &parity, &bits, &flow);

	return uart_set_options(&up->port, co, baud, parity, bits, flow);
}

static void sport_uart_console_putchar(struct uart_port *port, int ch)
{
	struct sport_uart_port *up = (struct sport_uart_port *)port;

	while (SPORT_GET_STAT(up) & TXF)
		barrier();

	tx_one_byte(up, ch);
}

/*
 * Interrupts are disabled on entering
 */
static void
sport_uart_console_write(struct console *co, const char *s, unsigned int count)
{
	struct sport_uart_port *up = bfin_sport_uart_ports[co->index];
	unsigned long flags;

	spin_lock_irqsave(&up->port.lock, flags);

	if (SPORT_GET_TCR1(up) & TSPEN)
		uart_console_write(&up->port, s, count, sport_uart_console_putchar);
	else {
		/* dummy data to start sport */
		while (SPORT_GET_STAT(up) & TXF)
			barrier();
		SPORT_PUT_TX(up, 0xffff);
		/* Enable transmit, then an interrupt will generated */
		SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
		SSYNC();

		uart_console_write(&up->port, s, count, sport_uart_console_putchar);

		/* Although the hold register is empty, last byte is still in shift
		 * register and not sent out yet. So, put a dummy data into TX FIFO.
		 * Then, sport tx stops when last byte is shift out and the dummy
		 * data is moved into the shift register.
		 */
		while (SPORT_GET_STAT(up) & TXF)
			barrier();
		SPORT_PUT_TX(up, 0xffff);
		while (!(SPORT_GET_STAT(up) & TXHRE))
			barrier();

		/* Stop sport tx transfer */
		SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
		SSYNC();
622
	}
623 624 625 626 627 628 629 630 631 632 633 634 635 636

	spin_unlock_irqrestore(&up->port.lock, flags);
}

static struct uart_driver sport_uart_reg;

static struct console sport_uart_console = {
	.name		= DEVICE_NAME,
	.write		= sport_uart_console_write,
	.device		= uart_console_device,
	.setup		= sport_uart_console_setup,
	.flags		= CON_PRINTBUFFER,
	.index		= -1,
	.data		= &sport_uart_reg,
637 638
};

639 640 641 642 643 644
#define SPORT_UART_CONSOLE	(&sport_uart_console)
#else
#define SPORT_UART_CONSOLE	NULL
#endif /* CONFIG_SERIAL_BFIN_SPORT_CONSOLE */


645 646
static struct uart_driver sport_uart_reg = {
	.owner		= THIS_MODULE,
647 648
	.driver_name	= DRV_NAME,
	.dev_name	= DEVICE_NAME,
649 650
	.major		= 204,
	.minor		= 84,
651 652
	.nr		= BFIN_SPORT_UART_MAX_PORTS,
	.cons		= SPORT_UART_CONSOLE,
653 654
};

655 656
#ifdef CONFIG_PM
static int sport_uart_suspend(struct device *dev)
657
{
658
	struct sport_uart_port *sport = dev_get_drvdata(dev);
659

660
	dev_dbg(dev, "%s enter\n", __func__);
661 662 663 664 665 666
	if (sport)
		uart_suspend_port(&sport_uart_reg, &sport->port);

	return 0;
}

667
static int sport_uart_resume(struct device *dev)
668
{
669
	struct sport_uart_port *sport = dev_get_drvdata(dev);
670

671
	dev_dbg(dev, "%s enter\n", __func__);
672 673 674 675 676 677
	if (sport)
		uart_resume_port(&sport_uart_reg, &sport->port);

	return 0;
}

678 679 680 681 682 683 684
static struct dev_pm_ops bfin_sport_uart_dev_pm_ops = {
	.suspend	= sport_uart_suspend,
	.resume		= sport_uart_resume,
};
#endif

static int __devinit sport_uart_probe(struct platform_device *pdev)
685
{
686 687 688
	struct resource *res;
	struct sport_uart_port *sport;
	int ret = 0;
689

690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776
	dev_dbg(&pdev->dev, "%s enter\n", __func__);

	if (pdev->id < 0 || pdev->id >= BFIN_SPORT_UART_MAX_PORTS) {
		dev_err(&pdev->dev, "Wrong sport uart platform device id.\n");
		return -ENOENT;
	}

	if (bfin_sport_uart_ports[pdev->id] == NULL) {
		bfin_sport_uart_ports[pdev->id] =
			kmalloc(sizeof(struct sport_uart_port), GFP_KERNEL);
		sport = bfin_sport_uart_ports[pdev->id];
		if (!sport) {
			dev_err(&pdev->dev,
				"Fail to kmalloc sport_uart_port\n");
			return -ENOMEM;
		}

		ret = peripheral_request_list(
			(unsigned short *)pdev->dev.platform_data, DRV_NAME);
		if (ret) {
			dev_err(&pdev->dev,
				"Fail to request SPORT peripherals\n");
			goto out_error_free_mem;
		}

		spin_lock_init(&sport->port.lock);
		sport->port.fifosize  = SPORT_TX_FIFO_SIZE,
		sport->port.ops       = &sport_uart_ops;
		sport->port.line      = pdev->id;
		sport->port.iotype    = UPIO_MEM;
		sport->port.flags     = UPF_BOOT_AUTOCONF;

		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
		if (res == NULL) {
			dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
			ret = -ENOENT;
			goto out_error_free_peripherals;
		}

		sport->port.membase = ioremap(res->start,
			res->end - res->start);
		if (!sport->port.membase) {
			dev_err(&pdev->dev, "Cannot map sport IO\n");
			ret = -ENXIO;
			goto out_error_free_peripherals;
		}

		sport->port.irq = platform_get_irq(pdev, 0);
		if (sport->port.irq < 0) {
			dev_err(&pdev->dev, "No sport RX/TX IRQ specified\n");
			ret = -ENOENT;
			goto out_error_unmap;
		}

		sport->err_irq = platform_get_irq(pdev, 1);
		if (sport->err_irq < 0) {
			dev_err(&pdev->dev, "No sport status IRQ specified\n");
			ret = -ENOENT;
			goto out_error_unmap;
		}
	}

#ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
	if (!is_early_platform_device(pdev)) {
#endif
		sport = bfin_sport_uart_ports[pdev->id];
		sport->port.dev = &pdev->dev;
		dev_set_drvdata(&pdev->dev, sport);
		ret = uart_add_one_port(&sport_uart_reg, &sport->port);
#ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
	}
#endif
	if (!ret)
		return 0;

	if (sport) {
out_error_unmap:
		iounmap(sport->port.membase);
out_error_free_peripherals:
		peripheral_free_list(
			(unsigned short *)pdev->dev.platform_data);
out_error_free_mem:
		kfree(sport);
		bfin_sport_uart_ports[pdev->id] = NULL;
	}

	return ret;
777 778
}

779
static int __devexit sport_uart_remove(struct platform_device *pdev)
780
{
781
	struct sport_uart_port *sport = platform_get_drvdata(pdev);
782

783 784
	dev_dbg(&pdev->dev, "%s enter\n", __func__);
	dev_set_drvdata(&pdev->dev, NULL);
785

786
	if (sport) {
787
		uart_remove_one_port(&sport_uart_reg, &sport->port);
788 789 790 791 792 793
		iounmap(sport->port.membase);
		peripheral_free_list(
			(unsigned short *)pdev->dev.platform_data);
		kfree(sport);
		bfin_sport_uart_ports[pdev->id] = NULL;
	}
794 795 796 797 798 799

	return 0;
}

static struct platform_driver sport_uart_driver = {
	.probe		= sport_uart_probe,
800
	.remove		= __devexit_p(sport_uart_remove),
801 802
	.driver		= {
		.name	= DRV_NAME,
803 804 805
#ifdef CONFIG_PM
		.pm	= &bfin_sport_uart_dev_pm_ops,
#endif
806 807 808
	},
};

809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828
#ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
static __initdata struct early_platform_driver early_sport_uart_driver = {
	.class_str = DRV_NAME,
	.pdrv = &sport_uart_driver,
	.requested_id = EARLY_PLATFORM_ID_UNSET,
};

static int __init sport_uart_rs_console_init(void)
{
	early_platform_driver_register(&early_sport_uart_driver, DRV_NAME);

	early_platform_driver_probe(DRV_NAME, BFIN_SPORT_UART_MAX_PORTS, 0);

	register_console(&sport_uart_console);

	return 0;
}
console_initcall(sport_uart_rs_console_init);
#endif

829 830 831 832
static int __init sport_uart_init(void)
{
	int ret;

833 834
	pr_info("Serial: Blackfin uart over sport driver\n");

835
	ret = uart_register_driver(&sport_uart_reg);
836 837
	if (ret) {
		pr_err("failed to register %s:%d\n",
838 839 840 841 842
				sport_uart_reg.driver_name, ret);
		return ret;
	}

	ret = platform_driver_register(&sport_uart_driver);
843 844
	if (ret) {
		pr_err("failed to register sport uart driver:%d\n", ret);
845 846 847 848 849
		uart_unregister_driver(&sport_uart_reg);
	}

	return ret;
}
850
module_init(sport_uart_init);
851 852 853 854 855 856 857 858

static void __exit sport_uart_exit(void)
{
	platform_driver_unregister(&sport_uart_driver);
	uart_unregister_driver(&sport_uart_reg);
}
module_exit(sport_uart_exit);

859 860
MODULE_AUTHOR("Sonic Zhang, Roy Huang");
MODULE_DESCRIPTION("Blackfin serial over SPORT driver");
861
MODULE_LICENSE("GPL");