• Chen-Yu Tsai's avatar
    clk: sunxi-ng: Add clk notifier to gate then ungate PLL clocks · 02ae2bc6
    Chen-Yu Tsai authored
    In common PLL designs, changes to the dividers take effect almost
    immediately, while changes to the multipliers (implemented as
    dividers in the feedback loop) take a few cycles to work into
    the feedback loop for the PLL to stablize.
    
    Sometimes when the PLL clock rate is changed, the decrease in the
    divider is too much for the decrease in the multiplier to catch up.
    The PLL clock rate will spike, and in some cases, might lock up
    completely. This is especially the case if the divider changed is
    the pre-divider, which affects the reference frequency.
    
    This patch introduces a clk notifier callback that will gate and
    then ungate a clk after a rate change, effectively resetting it,
    so it continues to work, despite any possible lockups. Care must
    be taken to reparent any consumers to other temporary clocks during
    the rate change, and that this notifier callback must be the first
    to be registered.
    
    This is intended to fix occasional lockups with cpufreq on newer
    Allwinner SoCs, such as the A33 and the H3. Previously it was
    thought that reparenting the cpu clock away from the PLL while
    it stabilized was enough, as this worked quite well on the A31.
    
    On the A33, hangs have been observed after cpufreq was recently
    introduced. With the H3, a more thorough test [1] showed that
    reparenting alone isn't enough. The system still locks up unless
    the dividers are limited to 1.
    
    A hunch was if the PLL was stuck in some unknown state, perhaps
    gating then ungating it would bring it back to normal. Tests
    done by Icenowy Zheng using Ondrej's test firmware shows this
    to be a valid solution.
    
    [1] http://www.spinics.net/lists/arm-kernel/msg552501.htmlReported-by: default avatarOndrej Jirman <megous@megous.com>
    Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
    Tested-by: default avatarIcenowy Zheng <icenowy@aosc.io>
    Tested-by: default avatarQuentin Schulz <quentin.schulz@free-electrons.com>
    Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
    02ae2bc6
ccu_common.c 3.88 KB