• Ofer Levi's avatar
    net/mlx5e: Add CQE compression support for multi-strides packets · b7cf0806
    Ofer Levi authored
    Add CQE compression support for completions of packets that span
    multiple strides in a Striding RQ, per the HW capability.
    In our memory model, we use small strides (256B as of today) for the
    non-linear SKB mode. This feature allows CQE compression to work also
    for multiple strides packets. In this case decompressing the mini CQE
    array will use stride index provided by HW as part of the mini CQE.
    Before this feature, compression was possible only for single-strided
    packets, i.e. for packets of size up to 256 bytes when in non-linear
    mode, and the index was maintained by SW.
    This feature is supported for ConnectX-5 and above.
    
    Feature performance test:
    This was whitebox-tested, we reduced the PCI speed from 125Gb/s to
    62.5Gb/s to overload pci and manipulated mlx5 driver to drop incoming
    packets before building the SKB to achieve low cpu utilization.
    Outcome is low cpu utilization and bottleneck on pci only.
    Test setup:
    Server: Intel(R) Xeon(R) Silver 4108 CPU @ 1.80GHz server, 32 cores
    NIC: ConnectX-6 DX.
    Sender side generates 300 byte packets at full pci bandwidth.
    Receiver side configuration:
    Single channel, one cpu processing with one ring allocated. Cpu utilization
    is ~20% while pci bandwidth is fully utilized.
    For the generated traffic and interface MTU of 4500B (to activate the
    non-linear SKB mode), packet rate improvement is about 19% from ~17.6Mpps
    to ~21Mpps.
    Without this feature, counters show no CQE compression blocks for
    this setup, while with the feature, counters show ~20.7Mpps compressed CQEs
    in ~500K compression blocks.
    Signed-off-by: default avatarOfer Levi <oferle@mellanox.com>
    Reviewed-by: default avatarTariq Toukan <tariqt@nvidia.com>
    Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
    b7cf0806
en_rx.c 47.5 KB