• David Daney's avatar
    MIPS: Octeon: Rewrite interrupt handling code. · 0c326387
    David Daney authored
    This includes conversion to new style irq_chip functions, and
    correctly enabling/disabling per-CPU interrupts.
    
    The hardware interrupt bit to irq number mapping is now done with a
    flexible map, instead of by bit twiddling the irq number.
    
    [ tglx: Adjusted to new irq_cpu_on/offline callbacks and
            __irq_set_affinity_lock ]
    Signed-off-by: default avatarDavid Daney <ddaney@caviumnetworks.com>
    Cc: linux-mips@linux-mips.org
    Cc: ralf@linux-mips.org
    LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
    Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
    0c326387
octeon-irq.c 29.8 KB